--- a/source.c
+++ b/source.c
@@ -5,7 +5,7 @@
 {

     rndis_set_cmplt_type *resp =
+
             rndis_queue_response(s, sizeof(rndis_set_cmplt_type));

     uint32_t bufoffs, buflen;

static int rndis_set_response(USBNetState *s,

                rndis_set_msg_type *buf, unsigned int length)

{

    rndis_set_cmplt_type *resp =

            rndis_queue_response(s, sizeof(rndis_set_cmplt_type));

    uint32_t bufoffs, buflen;

    int ret;

    if (!resp)

        return USB_RET_STALL;

    bufoffs = le32_to_cpu(buf->InformationBufferOffset) + 8;

    buflen = le32_to_cpu(buf->InformationBufferLength);

    if (bufoffs + buflen > length)

        return USB_RET_STALL;

    ret = ndis_set(s, le32_to_cpu(buf->OID),

                    bufoffs + (uint8_t *) buf, buflen);

    resp->MessageType = cpu_to_le32(RNDIS_SET_CMPLT);

    resp->RequestID = buf->RequestID; /* Still LE in msg buffer */

    resp->MessageLength = cpu_to_le32(sizeof(rndis_set_cmplt_type));

    if (ret < 0) {

        /* OID not supported */

        resp->Status = cpu_to_le32(RNDIS_STATUS_NOT_SUPPORTED);

        return 0;

    }

    resp->Status = cpu_to_le32(RNDIS_STATUS_SUCCESS);

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,22 +1,22 @@
+static int xan_unpack_luma(const uint8_t *src, const int src_size,

+                           uint8_t *dst, const int dst_size)

 {

+   int tree_size, eof;
+
+   const uint8_t *tree;
+
    int bits, mask;
+
    int tree_root, node;
+
    const uint8_t *dst_end = dst + dst_size;

    const uint8_t *src_end = src + src_size;

+

    tree_size = *src++;

@@ -24,12 +24,12 @@

    tree      = src - eof * 2 - 2;

+   tree_root = eof + tree_size;
+
    src += tree_size * 2;

+
    node = tree_root;

    bits = *src++;

static int xan_unpack_luma(const uint8_t *src, const int src_size,

                           uint8_t *dst, const int dst_size)

{

   int tree_size, eof;

   const uint8_t *tree;

   int bits, mask;

   int tree_root, node;

   const uint8_t *dst_end = dst + dst_size;

   const uint8_t *src_end = src + src_size;

   tree_size = *src++;

   eof       = *src++;

   tree      = src - eof * 2 - 2;

   tree_root = eof + tree_size;

   src += tree_size * 2;

   node = tree_root;

   bits = *src++;

   mask = 0x80;

   for (;;) {

       int bit = !!(bits & mask);

       mask >>= 1;

       node = tree[node*2 + bit];

       if (node == eof)

           break;

       if (node < eof) {

           *dst++ = node;

           if (dst > dst_end)

               break;

           node = tree_root;

       }

       if (!mask) {

           bits = *src++;

           if (src > src_end)

               break;

           mask = 0x80;

       }

   }

   return dst != dst_end;

}


static void t_gen_mulu(TCGv d, TCGv d2, TCGv a, TCGv b)

{

	TCGv t0, t1;

	t0 = tcg_temp_new(TCG_TYPE_I64);

	t1 = tcg_temp_new(TCG_TYPE_I64);

	tcg_gen_extu_i32_i64(t0, a);

	tcg_gen_extu_i32_i64(t1, b);

	tcg_gen_mul_i64(t0, t0, t1);

	tcg_gen_trunc_i64_i32(d, t0);

	tcg_gen_shri_i64(t0, t0, 32);

	tcg_gen_trunc_i64_i32(d2, t0);

	tcg_temp_free(t0);

	tcg_temp_free(t1);

}


--- a/source.c
+++ b/source.c
@@ -20,11 +20,11 @@

     TRACE("Sending option request %" PRIu32", len %" PRIu32, opt, len);

+
+
+    stq_be_p(&req.magic, NBD_OPTS_MAGIC);
+
+    stl_be_p(&req.option, opt);

     stl_be_p(&req.length, len);

static int nbd_send_option_request(QIOChannel *ioc, uint32_t opt,

                                   uint32_t len, const char *data,

                                   Error **errp)

{

    nbd_option req;

    QEMU_BUILD_BUG_ON(sizeof(req) != 16);

    if (len == -1) {

        req.length = len = strlen(data);

    }

    TRACE("Sending option request %" PRIu32", len %" PRIu32, opt, len);

    stq_be_p(&req.magic, NBD_OPTS_MAGIC);

    stl_be_p(&req.option, opt);

    stl_be_p(&req.length, len);

    if (write_sync(ioc, &req, sizeof(req), errp) < 0) {

        error_prepend(errp, "Failed to send option request header");

        return -1;

    }

    if (len && write_sync(ioc, (char *) data, len, errp) < 0) {

        error_prepend(errp, "Failed to send option request data");

        return -1;

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -47,11 +47,11 @@

     if (!get_vhost_net(nc->peer)) {
+
+        return features;
+
+    }
+
     return vhost_net_get_features(get_vhost_net(nc->peer), features);

 }

static uint32_t virtio_net_get_features(VirtIODevice *vdev, uint32_t features)

{

    VirtIONet *n = VIRTIO_NET(vdev);

    NetClientState *nc = qemu_get_queue(n->nic);

    features |= (1 << VIRTIO_NET_F_MAC);

    if (!peer_has_vnet_hdr(n)) {

        features &= ~(0x1 << VIRTIO_NET_F_CSUM);

        features &= ~(0x1 << VIRTIO_NET_F_HOST_TSO4);

        features &= ~(0x1 << VIRTIO_NET_F_HOST_TSO6);

        features &= ~(0x1 << VIRTIO_NET_F_HOST_ECN);

        features &= ~(0x1 << VIRTIO_NET_F_GUEST_CSUM);

        features &= ~(0x1 << VIRTIO_NET_F_GUEST_TSO4);

        features &= ~(0x1 << VIRTIO_NET_F_GUEST_TSO6);

        features &= ~(0x1 << VIRTIO_NET_F_GUEST_ECN);

    }

    if (!peer_has_vnet_hdr(n) || !peer_has_ufo(n)) {

        features &= ~(0x1 << VIRTIO_NET_F_GUEST_UFO);

        features &= ~(0x1 << VIRTIO_NET_F_HOST_UFO);

    }

    if (!get_vhost_net(nc->peer)) {

        return features;

    }

    return vhost_net_get_features(get_vhost_net(nc->peer), features);

}


--- a/source.c
+++ b/source.c
@@ -12,11 +12,11 @@

     for (y0 = 0; y0 < height; y0 += 4)

+        for (x = 0; x < width; x++)
+
+            for (y = y0; y < height && y < y0 + 4; y++) {
+
+                int flags_mask = -1;

                 if (vert_causal_ctx_csty_symbol && y == y0 + 3)

static void decode_sigpass(Jpeg2000T1Context *t1, int width, int height,

                           int bpno, int bandno,

                           int vert_causal_ctx_csty_symbol)

{

    int mask = 3 << (bpno - 1), y0, x, y;

    for (y0 = 0; y0 < height; y0 += 4)

        for (x = 0; x < width; x++)

            for (y = y0; y < height && y < y0 + 4; y++) {

                int flags_mask = -1;

                if (vert_causal_ctx_csty_symbol && y == y0 + 3)

                    flags_mask &= ~(JPEG2000_T1_SIG_S | JPEG2000_T1_SIG_SW | JPEG2000_T1_SIG_SE | JPEG2000_T1_SGN_S);

                if ((t1->flags[y+1][x+1] & JPEG2000_T1_SIG_NB & flags_mask)

                && !(t1->flags[y+1][x+1] & (JPEG2000_T1_SIG | JPEG2000_T1_VIS))) {

                    if (ff_mqc_decode(&t1->mqc, t1->mqc.cx_states + ff_jpeg2000_getsigctxno(t1->flags[y+1][x+1] & flags_mask, bandno))) {

                        int xorbit, ctxno = ff_jpeg2000_getsgnctxno(t1->flags[y+1][x+1] & flags_mask, &xorbit);

                        if (t1->mqc.raw)

                             t1->data[y][x] = ff_mqc_decode(&t1->mqc, t1->mqc.cx_states + ctxno) ? -mask : mask;

                        else

                             t1->data[y][x] = (ff_mqc_decode(&t1->mqc, t1->mqc.cx_states + ctxno) ^ xorbit) ?

                                               -mask : mask;

                        ff_jpeg2000_set_significance(t1, x, y,

                                                     t1->data[y][x] < 0);

                    }

                    t1->flags[y + 1][x + 1] |= JPEG2000_T1_VIS;

                }

            }

}


--- a/source.c
+++ b/source.c
@@ -27,11 +27,11 @@
     visit_start_list(v, NULL, NULL, 0, &error_abort);

     visit_type_int(v, NULL, &i64, &error_abort);
+
+    g_assert_cmpint(i64, ==, 1);
+
+    visit_end_list(v, NULL);
+
     /* BUG: unvisited tail not reported; actually not reportable by design */

     visit_end_list(v, NULL);

static void test_visitor_in_fail_list_nested(TestInputVisitorData *data,

                                             const void *unused)

{

    int64_t i64 = -1;

    Visitor *v;

    /* Unvisited nested list tail */

    v = visitor_input_test_init(data, "[ 0, [ 1, 2, 3 ] ]");

    visit_start_list(v, NULL, NULL, 0, &error_abort);

    visit_type_int(v, NULL, &i64, &error_abort);

    g_assert_cmpint(i64, ==, 0);

    visit_start_list(v, NULL, NULL, 0, &error_abort);

    visit_type_int(v, NULL, &i64, &error_abort);

    g_assert_cmpint(i64, ==, 1);

    visit_end_list(v, NULL);

    /* BUG: unvisited tail not reported; actually not reportable by design */

    visit_end_list(v, NULL);

}


--- a/source.c
+++ b/source.c
@@ -12,7 +12,7 @@

+    visit_type_int64(v, name, &value, &local_err);

     if (local_err) {

static void iothread_set_poll_max_ns(Object *obj, Visitor *v,

        const char *name, void *opaque, Error **errp)

{

    IOThread *iothread = IOTHREAD(obj);

    Error *local_err = NULL;

    int64_t value;

    visit_type_int64(v, name, &value, &local_err);

    if (local_err) {

        goto out;

    }

    if (value < 0) {

        error_setg(&local_err, "poll_max_ns value must be in range "

                   "[0, %"PRId64"]", INT64_MAX);

        goto out;

    }

    iothread->poll_max_ns = value;

    if (iothread->ctx) {

        aio_context_set_poll_params(iothread->ctx, value, &local_err);

    }

out:

    error_propagate(errp, local_err);

}


--- a/source.c
+++ b/source.c
@@ -21,9 +21,9 @@
         qemu_opt_set_number(opts, "to", addr->to, &error_abort);

     }
+
+    qemu_opt_set(opts, "host", addr->host, &error_abort);
+
+    qemu_opt_set(opts, "port", addr->port, &error_abort);
+
 }

static void inet_addr_to_opts(QemuOpts *opts, const InetSocketAddress *addr)

{

    bool ipv4 = addr->ipv4 || !addr->has_ipv4;

    bool ipv6 = addr->ipv6 || !addr->has_ipv6;

    if (!ipv4 || !ipv6) {

        qemu_opt_set_bool(opts, "ipv4", ipv4, &error_abort);

        qemu_opt_set_bool(opts, "ipv6", ipv6, &error_abort);

    }

    if (addr->has_to) {

        qemu_opt_set_number(opts, "to", addr->to, &error_abort);

    }

    qemu_opt_set(opts, "host", addr->host, &error_abort);

    qemu_opt_set(opts, "port", addr->port, &error_abort);

}


--- a/source.c
+++ b/source.c
@@ -3,5 +3,5 @@
 {

     unsupported_encoding(s, insn);
+
 }

static void disas_fp_2src(DisasContext *s, uint32_t insn)

{

    unsupported_encoding(s, insn);

}


--- a/source.c
+++ b/source.c
@@ -5,10 +5,10 @@
 {

     /* If the address-part contains a colon, it's an IPv6 IP so needs [] */
+
+    if (strstr(address, ":")) {
+
+        snprintf(buf, len, "[%s]:%u", address, port);

     } else {

static void combine_addr(char *buf, size_t len, const char* address,

                         uint16_t port)

{

    /* If the address-part contains a colon, it's an IPv6 IP so needs [] */

    if (strstr(address, ":")) {

        snprintf(buf, len, "[%s]:%u", address, port);

    } else {

        snprintf(buf, len, "%s:%u", address, port);

    }

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 void ff_avg_h264_qpel16_mc32_msa(uint8_t *dst, const uint8_t *src,
+
+                                 ptrdiff_t stride)

 {

void ff_avg_h264_qpel16_mc32_msa(uint8_t *dst, const uint8_t *src,

                                 ptrdiff_t stride)

{

    avc_luma_midh_qrt_and_aver_dst_16w_msa(src - (2 * stride) - 2,

                                           stride, dst, stride, 16, 1);

}


--- a/source.c
+++ b/source.c
@@ -3,7 +3,7 @@
     DfaContext *s = avctx->priv_data;
     avctx->pix_fmt = PIX_FMT_PAL8;
     s->frame_buf = av_mallocz(avctx->width * avctx->height + AV_LZO_OUTPUT_PADDING);
+    if (!s->frame_buf)
+        return AVERROR(ENOMEM);
     return 0;
 }

static av_cold int dfa_decode_init(AVCodecContext *avctx)
{
    DfaContext *s = avctx->priv_data;
    avctx->pix_fmt = PIX_FMT_PAL8;
    s->frame_buf = av_mallocz(avctx->width * avctx->height + AV_LZO_OUTPUT_PADDING);
    if (!s->frame_buf)
        return AVERROR(ENOMEM);
    return 0;
}


--- a/source.c
+++ b/source.c
@@ -7,9 +7,9 @@
     aml_append(var, arg1);

     aml_append(var, arg2);
+
+    build_append_byte(var->buf, 0x00 /* NullNameOp */);
+
     return var;

 }

Aml *aml_and(Aml *arg1, Aml *arg2)

{

    Aml *var = aml_opcode(0x7B /* AndOp */);

    aml_append(var, arg1);

    aml_append(var, arg2);

    build_append_byte(var->buf, 0x00 /* NullNameOp */);

    return var;

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
+static av_cold int libopenjpeg_encode_close(AVCodecContext *avctx)
+
+{
+
     LibOpenJPEGContext *ctx = avctx->priv_data;

static av_cold int libopenjpeg_encode_close(AVCodecContext *avctx)

{

    LibOpenJPEGContext *ctx = avctx->priv_data;

    opj_destroy_compress(ctx->compress);

    opj_image_destroy(ctx->image);

    av_freep(&avctx->coded_frame);

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 void OPPROTO op_4xx_tlbsx_check (void)

 {
+
     int tmp;

void OPPROTO op_4xx_tlbsx_check (void)

{

    int tmp;

    tmp = xer_so;

    if (T0 != -1)

        tmp |= 0x02;

    env->crf[0] = tmp;

    RETURN();

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 static void virtio_set_status(struct subchannel_id schid,

                               unsigned long dev_addr)
+
 {

     unsigned char status = dev_addr;

static void virtio_set_status(struct subchannel_id schid,

                              unsigned long dev_addr)

{

    unsigned char status = dev_addr;

    if (run_ccw(schid, CCW_CMD_WRITE_STATUS, &status, sizeof(status))) {

        virtio_panic("Could not write status to host!\n");

    }

}


--- a/source.c
+++ b/source.c
@@ -11,7 +11,7 @@
     QTAILQ_INIT(&ml_head);

+
     mon_printf(f, "memory\n");

     mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);

void mtree_info(fprintf_function mon_printf, void *f)

{

    MemoryRegionListHead ml_head;

    MemoryRegionList *ml, *ml2;

    QTAILQ_INIT(&ml_head);

    mon_printf(f, "memory\n");

    mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);

    /* print aliased regions */

    QTAILQ_FOREACH(ml, &ml_head, queue) {

        if (!ml->printed) {

            mon_printf(f, "%s\n", ml->mr->name);

            mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);

        }

    }

    QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {

        g_free(ml2);

    }

    if (address_space_io.root &&

        !QTAILQ_EMPTY(&address_space_io.root->subregions)) {

        QTAILQ_INIT(&ml_head);

        mon_printf(f, "I/O\n");

        mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head);

    }

}


--- a/source.c
+++ b/source.c
@@ -1,4 +1,4 @@
+static void yop_paint_block(YopDecContext *s, int tag)

 {

static void yop_paint_block(YopDecContext *s, int tag)

{

    s->dstptr[0]                        = s->srcptr[0];

    s->dstptr[1]                        = s->srcptr[paint_lut[tag][0]];

    s->dstptr[s->frame.linesize[0]]     = s->srcptr[paint_lut[tag][1]];

    s->dstptr[s->frame.linesize[0] + 1] = s->srcptr[paint_lut[tag][2]];

    // The number of src bytes consumed is in the last part of the lut entry.

    s->srcptr += paint_lut[tag][3];

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 int ff_MPV_lowest_referenced_row(MpegEncContext *s, int dir)

 {
+
     int my_max = INT_MIN, my_min = INT_MAX, qpel_shift = !s->quarter_sample;

     int my, off, i, mvs;

int ff_MPV_lowest_referenced_row(MpegEncContext *s, int dir)

{

    int my_max = INT_MIN, my_min = INT_MAX, qpel_shift = !s->quarter_sample;

    int my, off, i, mvs;

    if (s->picture_structure != PICT_FRAME) goto unhandled;

    switch (s->mv_type) {

        case MV_TYPE_16X16:

            mvs = 1;

            break;

        case MV_TYPE_16X8:

            mvs = 2;

            break;

        case MV_TYPE_8X8:

            mvs = 4;

            break;

        default:

            goto unhandled;

    }

    for (i = 0; i < mvs; i++) {

        my = s->mv[dir][i][1]<<qpel_shift;

        my_max = FFMAX(my_max, my);

        my_min = FFMIN(my_min, my);

    }

    off = (FFMAX(-my_min, my_max) + 63) >> 6;

    return FFMIN(FFMAX(s->mb_y + off, 0), s->mb_height-1);

unhandled:

    return s->mb_height-1;

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 unsigned iov_copy(struct iovec *dst_iov, unsigned int dst_iov_cnt,

                  const struct iovec *iov, unsigned int iov_cnt,
+
                  size_t offset, size_t bytes)

 {

unsigned iov_copy(struct iovec *dst_iov, unsigned int dst_iov_cnt,

                 const struct iovec *iov, unsigned int iov_cnt,

                 size_t offset, size_t bytes)

{

    size_t len;

    unsigned int i, j;

    for (i = 0, j = 0; i < iov_cnt && j < dst_iov_cnt && bytes; i++) {

        if (offset >= iov[i].iov_len) {

            offset -= iov[i].iov_len;

            continue;

        }

        len = MIN(bytes, iov[i].iov_len - offset);

        dst_iov[j].iov_base = iov[i].iov_base + offset;

        dst_iov[j].iov_len = len;

        j++;

        bytes -= len;

        offset = 0;

    }

    assert(offset == 0);

    return j;

}


--- a/source.c
+++ b/source.c
@@ -2,11 +2,11 @@

                         BlockDriverState *value)

+{
+
+    Error *err = NULL;
+
+    const char *bdrv_name = value ? bdrv_get_device_name(value) : "";

     object_property_set_str(OBJECT(dev), bdrv_name,

int qdev_prop_set_drive(DeviceState *dev, const char *name,

                        BlockDriverState *value)

{

    Error *err = NULL;

    const char *bdrv_name = value ? bdrv_get_device_name(value) : "";

    object_property_set_str(OBJECT(dev), bdrv_name,

                            name, &err);

    if (err) {

        qerror_report_err(err);

        error_free(err);

        return -1;

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -7,11 +7,11 @@
     QDictEntry *entry;

+
+    LIST_FOREACH(entry, &qdict->table[hash], next)
+
+        if (!strcmp(entry->key, key))
+
             return entry;

static QDictEntry *qdict_find(const QDict *qdict,

                              const char *key, unsigned int hash)

{

    QDictEntry *entry;

    LIST_FOREACH(entry, &qdict->table[hash], next)

        if (!strcmp(entry->key, key))

            return entry;

    return NULL;

}


--- a/source.c
+++ b/source.c
@@ -6,9 +6,9 @@

 {

+    int16_t *samples = data;

+    MACEContext *ctx = avctx->priv_data;

     int i, j;

static int mace6_decode_frame(AVCodecContext *avctx,

                              void *data, int *data_size,

                              const uint8_t *buf, int buf_size)

{

    int16_t *samples = data;

    MACEContext *ctx = avctx->priv_data;

    int i, j;

    for(i = 0; i < avctx->channels; i++) {

        int16_t *output = samples + i;

        for (j = 0; j < buf_size / avctx->channels; j++) {

            uint8_t pkt = buf[i + j*avctx->channels];

            chomp6(&ctx->chd[i], output, pkt >> 5     , MACEtab1, MACEtab2,

                   8, avctx->channels);

            output += avctx->channels << 1;

            chomp6(&ctx->chd[i], output,(pkt >> 3) & 3, MACEtab3, MACEtab4,

                   4, avctx->channels);

            output += avctx->channels << 1;

            chomp6(&ctx->chd[i], output, pkt       & 7, MACEtab1, MACEtab2,

                   8, avctx->channels);

            output += avctx->channels << 1;

        }

    }

    *data_size = 2 * 6 * buf_size;

    return buf_size;

}


--- a/source.c
+++ b/source.c
@@ -4,7 +4,7 @@

 {

+    int ret;

@@ -16,7 +16,7 @@

         .filename = g_strdup(filename),

+        .options = options,

         .ret = NOT_DONE,

int bdrv_create(BlockDriver *drv, const char* filename,

    QEMUOptionParameter *options)

{

    int ret;

    Coroutine *co;

    CreateCo cco = {

        .drv = drv,

        .filename = g_strdup(filename),

        .options = options,

        .ret = NOT_DONE,

    };

    if (!drv->bdrv_create) {

        return -ENOTSUP;

    }

    if (qemu_in_coroutine()) {

        /* Fast-path if already in coroutine context */

        bdrv_create_co_entry(&cco);

    } else {

        co = qemu_coroutine_create(bdrv_create_co_entry);

        qemu_coroutine_enter(co, &cco);

        while (cco.ret == NOT_DONE) {

            qemu_aio_wait();

        }

    }

    ret = cco.ret;

    g_free(cco.filename);

    return ret;

}


--- a/source.c
+++ b/source.c
@@ -1,9 +1,9 @@
+static void gen_ove_cyov(DisasContext *dc, TCGv cy, TCGv ov)

+{
+
+    if (dc->tb_flags & SR_OVE) {
+
         TCGv t0 = tcg_temp_new();

         tcg_gen_or_tl(t0, cy, ov);

static void gen_ove_cyov(DisasContext *dc, TCGv cy, TCGv ov)

{

    if (dc->tb_flags & SR_OVE) {

        TCGv t0 = tcg_temp_new();

        tcg_gen_or_tl(t0, cy, ov);

        gen_helper_ove(cpu_env, t0);

        tcg_temp_free(t0);

    }

}


--- a/source.c
+++ b/source.c
@@ -10,11 +10,11 @@

     gigabyte_align = false;

+    smbios_legacy_mode = true;
+
+    has_reserved_memory = false;
+
+    option_rom_has_mr = true;

     rom_file_has_mr = false;

static void pc_init_isa(MachineState *machine)

{

    pci_enabled = false;

    has_acpi_build = false;

    smbios_defaults = false;

    gigabyte_align = false;

    smbios_legacy_mode = true;

    has_reserved_memory = false;

    option_rom_has_mr = true;

    rom_file_has_mr = false;

    if (!machine->cpu_model) {

        machine->cpu_model = "486";

    }

    x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);

    enable_compat_apic_id_mode();

    pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);

}


--- a/source.c
+++ b/source.c
@@ -1,5 +1,5 @@
 static int dvvideo_encode_frame(AVCodecContext *c, uint8_t *buf, int buf_size,
+
                                 void *data)

 {
@@ -8,7 +8,7 @@

+    s->sys = dv_codec_profile(c);

     if (!s->sys)

static int dvvideo_encode_frame(AVCodecContext *c, uint8_t *buf, int buf_size,

                                void *data)

{

    DVVideoContext *s = c->priv_data;

    s->sys = dv_codec_profile(c);

    if (!s->sys)

        return -1;

    if(buf_size < s->sys->frame_size)

        return -1;

    c->pix_fmt = s->sys->pix_fmt;

    s->picture = *((AVFrame *)data);

    s->picture.key_frame = 1;

    s->picture.pict_type = FF_I_TYPE;

    s->buf = buf;

    c->execute(c, dv_encode_mt, (void**)&s->dv_anchor[0], NULL,

               s->sys->difseg_size * 27);

    emms_c();

    return s->sys->frame_size;

}


--- a/source.c
+++ b/source.c
@@ -1,11 +1,11 @@
 void nbd_export_close(NBDExport *exp)

 {
+
+    NBDClient *client, *next;
+
+
+
     nbd_export_get(exp);

     QTAILQ_FOREACH_SAFE(client, &exp->clients, next, next) {

void nbd_export_close(NBDExport *exp)

{

    NBDClient *client, *next;

    nbd_export_get(exp);

    QTAILQ_FOREACH_SAFE(client, &exp->clients, next, next) {

        nbd_client_close(client);

    }

    nbd_export_set_name(exp, NULL);

    nbd_export_put(exp);

    if (exp->blk) {

        blk_remove_aio_context_notifier(exp->blk, blk_aio_attached,

                                        blk_aio_detach, exp);

        blk_unref(exp->blk);

        exp->blk = NULL;

    }

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 void ff_lzw_decode_tail(LZWState *p)

+{

     struct LZWState *s = (struct LZWState *)p;

void ff_lzw_decode_tail(LZWState *p)

{

    struct LZWState *s = (struct LZWState *)p;

    while(!s->eob_reached)

        lzw_get_code(s);

}


static inline void idct4col_put(uint8_t *dest, int line_size, const int16_t *col)

{

    int c0, c1, c2, c3, a0, a1, a2, a3;

    a0 = col[8*0];

    a1 = col[8*2];

    a2 = col[8*4];

    a3 = col[8*6];

    c0 = ((a0 + a2) << (CN_SHIFT - 1)) + (1 << (C_SHIFT - 1));

    c2 = ((a0 - a2) << (CN_SHIFT - 1)) + (1 << (C_SHIFT - 1));

    c1 = a1 * C1 + a3 * C2;

    c3 = a1 * C2 - a3 * C1;

    dest[0] = av_clip_uint8((c0 + c1) >> C_SHIFT);

    dest += line_size;

    dest[0] = av_clip_uint8((c2 + c3) >> C_SHIFT);

    dest += line_size;

    dest[0] = av_clip_uint8((c2 - c3) >> C_SHIFT);

    dest += line_size;

    dest[0] = av_clip_uint8((c0 - c1) >> C_SHIFT);

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 static int check_tag(AVIOContext *s, int offset, unsigned int len)

+{

     char tag[4];

static int check_tag(AVIOContext *s, int offset, unsigned int len)

{

    char tag[4];

    if (len > 4 ||

        avio_seek(s, offset, SEEK_SET) < 0 ||

        avio_read(s, tag, len) < len)

        return -1;

    else if (!AV_RB32(tag) || is_tag(tag, len))

        return 1;

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -3,11 +3,11 @@
                             int64_t timestamp)

 {
+
+    int frame_delay;
+
+    int64_t pts, dts;
+

     if (st->codec.codec_type == CODEC_TYPE_VIDEO &&

static void compute_pts_dts(AVStream *st, int64_t *ppts, int64_t *pdts,

                            int64_t timestamp)

{

    int frame_delay;

    int64_t pts, dts;

    if (st->codec.codec_type == CODEC_TYPE_VIDEO &&

        st->codec.max_b_frames != 0) {

        frame_delay = (st->codec.frame_rate_base * 90000LL) /

            st->codec.frame_rate;

        if (timestamp == 0) {

            /* specific case for first frame : DTS just before */

            pts = timestamp;

            dts = timestamp - frame_delay;

        } else {

            timestamp -= frame_delay;

            if (st->codec.coded_frame->pict_type == FF_B_TYPE) {

                /* B frames has identical pts/dts */

                pts = timestamp;

                dts = timestamp;

            } else {

                /* a reference frame has a pts equal to the dts of the

                   _next_ one */

                dts = timestamp;

                pts = timestamp + (st->codec.max_b_frames + 1) * frame_delay;

            }

        }

#if 1

        av_log(&st->codec, AV_LOG_DEBUG, "pts=%0.3f dts=%0.3f pict_type=%c\n",

               pts / 90000.0, dts / 90000.0,

               av_get_pict_type_char(st->codec.coded_frame->pict_type));

#endif

    } else {

        pts = timestamp;

        dts = timestamp;

    }

    *ppts = pts & ((1LL << 33) - 1);

    *pdts = dts & ((1LL << 33) - 1);

}


--- a/source.c
+++ b/source.c
@@ -3,7 +3,7 @@
 {

     GThread *thread;
+
 #ifndef _WIN32

     sigset_t set, oldset;

static GThread *trace_thread_create(GThreadFunc fn)

{

    GThread *thread;

#ifndef _WIN32

    sigset_t set, oldset;

    sigfillset(&set);

    pthread_sigmask(SIG_SETMASK, &set, &oldset);

#endif

    thread = g_thread_create(writeout_thread, NULL, FALSE, NULL);

#ifndef _WIN32

    pthread_sigmask(SIG_SETMASK, &oldset, NULL);

#endif

    return thread;

}


--- a/source.c
+++ b/source.c
@@ -3,11 +3,11 @@
                                 int *prot, int *access_index,

                                 target_ulong address, int rw, int mmu_idx)
+
+{
+
+    int is_user = mmu_idx == MMU_USER_IDX;
+

     if (rw == 2)

static int get_physical_address(CPUState *env, target_phys_addr_t *physical,

                                int *prot, int *access_index,

                                target_ulong address, int rw, int mmu_idx)

{

    int is_user = mmu_idx == MMU_USER_IDX;

    if (rw == 2)

        return get_physical_address_code(env, physical, prot, address,

                                         is_user);

    else

        return get_physical_address_data(env, physical, prot, address, rw,

                                         is_user);

}


--- a/source.c
+++ b/source.c
@@ -1,11 +1,11 @@
 static void gen_slbie(DisasContext *ctx)
+
+{
+
 #if defined(CONFIG_USER_ONLY)

     gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
+
 #else

     if (unlikely(ctx->pr)) {

static void gen_slbie(DisasContext *ctx)

{

#if defined(CONFIG_USER_ONLY)

    gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);

#else

    if (unlikely(ctx->pr)) {

        gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);

        return;

    }

    gen_helper_slbie(cpu_env, cpu_gpr[rB(ctx->opcode)]);

#endif

}


--- a/source.c
+++ b/source.c
@@ -1,14 +1,14 @@
 void smc91c111_init(NICInfo *nd, uint32_t base, qemu_irq irq)

+{

     smc91c111_state *s;
+
+    int iomemtype;

+    qemu_check_nic_model(nd, "smc91c111");

void smc91c111_init(NICInfo *nd, uint32_t base, qemu_irq irq)

{

    smc91c111_state *s;

    int iomemtype;

    qemu_check_nic_model(nd, "smc91c111");

    s = (smc91c111_state *)qemu_mallocz(sizeof(smc91c111_state));

    iomemtype = cpu_register_io_memory(0, smc91c111_readfn,

                                       smc91c111_writefn, s);

    cpu_register_physical_memory(base, 16, iomemtype);

    s->irq = irq;

    memcpy(s->macaddr, nd->macaddr, 6);

    smc91c111_reset(s);

    s->vc = qemu_new_vlan_client(nd->vlan, nd->model, nd->name,

                                 smc91c111_receive, smc91c111_can_receive, s);

    qemu_format_nic_info_str(s->vc, s->macaddr);

    /* ??? Save/restore.  */

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
+void rgb16tobgr16(const uint8_t *src, uint8_t *dst, unsigned int src_size)
+
+{

 	unsigned i;

void rgb16tobgr16(const uint8_t *src, uint8_t *dst, unsigned int src_size)

{

	unsigned i;

	unsigned num_pixels = src_size >> 1;

	for(i=0; i<num_pixels; i++)

	{

	    unsigned b,g,r;

	    register uint16_t rgb;

	    rgb = src[2*i];

	    r = rgb&0x1F;

	    g = (rgb&0x7E0)>>5;

	    b = (rgb&0xF800)>>11;

	    dst[2*i] = (b&0x1F) | ((g&0x3F)<<5) | ((r&0x1F)<<11);

	}

}


--- a/source.c
+++ b/source.c
@@ -21,11 +21,11 @@
     qsv->surface_used        = av_mallocz_array(qsv->nb_surfaces, sizeof(*qsv->surface_used));

     if (!qsv->opaque_surfaces_buf || !qsv->surface_ptrs || !qsv->surface_used)
+
+        return AVERROR(ENOMEM);
+
+
+
     surfaces = (mfxFrameSurface1*)qsv->opaque_surfaces_buf->data;

     for (i = 0; i < qsv->nb_surfaces; i++)

static int init_opaque_surf(QSVContext *qsv)

{

    AVQSVContext *hwctx_enc = qsv->ost->enc_ctx->hwaccel_context;

    mfxFrameSurface1 *surfaces;

    int i;

    qsv->nb_surfaces = hwctx_enc->nb_opaque_surfaces;

    qsv->opaque_surfaces_buf = av_buffer_ref(hwctx_enc->opaque_surfaces);

    qsv->surface_ptrs        = av_mallocz_array(qsv->nb_surfaces, sizeof(*qsv->surface_ptrs));

    qsv->surface_used        = av_mallocz_array(qsv->nb_surfaces, sizeof(*qsv->surface_used));

    if (!qsv->opaque_surfaces_buf || !qsv->surface_ptrs || !qsv->surface_used)

        return AVERROR(ENOMEM);

    surfaces = (mfxFrameSurface1*)qsv->opaque_surfaces_buf->data;

    for (i = 0; i < qsv->nb_surfaces; i++)

        qsv->surface_ptrs[i] = surfaces + i;

    qsv->opaque_alloc.Out.Surfaces   = qsv->surface_ptrs;

    qsv->opaque_alloc.Out.NumSurface = qsv->nb_surfaces;

    qsv->opaque_alloc.Out.Type       = hwctx_enc->opaque_alloc_type;

    qsv->opaque_alloc.Header.BufferId = MFX_EXTBUFF_OPAQUE_SURFACE_ALLOCATION;

    qsv->opaque_alloc.Header.BufferSz = sizeof(qsv->opaque_alloc);

    qsv->ext_buffers[0]               = (mfxExtBuffer*)&qsv->opaque_alloc;

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 static void xvid_idct_put(uint8_t *dest, ptrdiff_t line_size, int16_t *block)

+{

     ff_xvid_idct(block);

static void xvid_idct_put(uint8_t *dest, ptrdiff_t line_size, int16_t *block)

{

    ff_xvid_idct(block);

    ff_put_pixels_clamped(block, dest, line_size);

}


--- a/source.c
+++ b/source.c
@@ -39,11 +39,11 @@
         break;

+
+    default:
+
+        VTD_DPRINTF(GENERAL,
+
                     "error: wrong context-cache invalidation granularity");

         caig = 0;

static uint64_t vtd_context_cache_invalidate(IntelIOMMUState *s, uint64_t val)

{

    uint64_t caig;

    uint64_t type = val & VTD_CCMD_CIRG_MASK;

    switch (type) {

    case VTD_CCMD_GLOBAL_INVL:

        VTD_DPRINTF(INV, "Global invalidation request");

        caig = VTD_CCMD_GLOBAL_INVL_A;

        break;

    case VTD_CCMD_DOMAIN_INVL:

        VTD_DPRINTF(INV, "Domain-selective invalidation request");

        caig = VTD_CCMD_DOMAIN_INVL_A;

        break;

    case VTD_CCMD_DEVICE_INVL:

        VTD_DPRINTF(INV, "Domain-selective invalidation request");

        caig = VTD_CCMD_DEVICE_INVL_A;

        break;

    default:

        VTD_DPRINTF(GENERAL,

                    "error: wrong context-cache invalidation granularity");

        caig = 0;

    }

    return caig;

}


--- a/source.c
+++ b/source.c
@@ -1,9 +1,9 @@
 static void cpu_x86_register(X86CPU *cpu, const char *name, Error **errp)
+
+{
+
+    CPUX86State *env = &cpu->env;
+
     x86_def_t def1, *def = &def1;

static void cpu_x86_register(X86CPU *cpu, const char *name, Error **errp)

{

    CPUX86State *env = &cpu->env;

    x86_def_t def1, *def = &def1;

    memset(def, 0, sizeof(*def));

    if (cpu_x86_find_by_name(cpu, def, name) < 0) {

        error_setg(errp, "Unable to find CPU definition: %s", name);

        return;

    }

    if (kvm_enabled()) {

        def->features[FEAT_KVM] |= kvm_default_features;

    }

    def->features[FEAT_1_ECX] |= CPUID_EXT_HYPERVISOR;

    object_property_set_str(OBJECT(cpu), def->vendor, "vendor", errp);

    object_property_set_int(OBJECT(cpu), def->level, "level", errp);

    object_property_set_int(OBJECT(cpu), def->family, "family", errp);

    object_property_set_int(OBJECT(cpu), def->model, "model", errp);

    object_property_set_int(OBJECT(cpu), def->stepping, "stepping", errp);

    env->features[FEAT_1_EDX] = def->features[FEAT_1_EDX];

    env->features[FEAT_1_ECX] = def->features[FEAT_1_ECX];

    env->features[FEAT_8000_0001_EDX] = def->features[FEAT_8000_0001_EDX];

    env->features[FEAT_8000_0001_ECX] = def->features[FEAT_8000_0001_ECX];

    object_property_set_int(OBJECT(cpu), def->xlevel, "xlevel", errp);

    env->features[FEAT_KVM] = def->features[FEAT_KVM];

    env->features[FEAT_SVM] = def->features[FEAT_SVM];

    env->features[FEAT_C000_0001_EDX] = def->features[FEAT_C000_0001_EDX];

    env->features[FEAT_7_0_EBX] = def->features[FEAT_7_0_EBX];

    env->cpuid_xlevel2 = def->xlevel2;

    object_property_set_str(OBJECT(cpu), def->model_id, "model-id", errp);

}


--- a/source.c
+++ b/source.c
@@ -50,10 +50,10 @@

                                addr, s->xres, s->yres,

+                               src_width, -dest_width, -s->dest_width,
+
+                               s->invalidated,
+
+                               fn, s->dma_ch[0].palette, miny, maxy);

 }

static void pxa2xx_lcdc_dma0_redraw_rot180(PXA2xxLCDState *s,

                hwaddr addr, int *miny, int *maxy)

{

    DisplaySurface *surface = qemu_console_surface(s->con);

    int src_width, dest_width;

    drawfn fn = NULL;

    if (s->dest_width) {

        fn = s->line_fn[s->transp][s->bpp];

    }

    if (!fn) {

        return;

    }

    src_width = (s->xres + 3) & ~3;     /* Pad to a 4 pixels multiple */

    if (s->bpp == pxa_lcdc_19pbpp || s->bpp == pxa_lcdc_18pbpp) {

        src_width *= 3;

    } else if (s->bpp > pxa_lcdc_16bpp) {

        src_width *= 4;

    } else if (s->bpp > pxa_lcdc_8bpp) {

        src_width *= 2;

    }

    dest_width = s->xres * s->dest_width;

    *miny = 0;

    framebuffer_update_display(surface, s->sysmem,

                               addr, s->xres, s->yres,

                               src_width, -dest_width, -s->dest_width,

                               s->invalidated,

                               fn, s->dma_ch[0].palette, miny, maxy);

}


--- a/source.c
+++ b/source.c
@@ -1,9 +1,9 @@
 static void spr_write_ibatu_h (void *opaque, int sprn)

 {
+
+    DisasContext *ctx = opaque;
+

     gen_op_store_ibatu((sprn - SPR_IBAT4U) / 2);

static void spr_write_ibatu_h (void *opaque, int sprn)

{

    DisasContext *ctx = opaque;

    gen_op_store_ibatu((sprn - SPR_IBAT4U) / 2);

    RET_STOP(ctx);

}


--- a/source.c
+++ b/source.c
@@ -2,6 +2,6 @@

 {

+    return lduw_phys_internal(addr, DEVICE_LITTLE_ENDIAN);

 }

uint32_t lduw_le_phys(target_phys_addr_t addr)

{

    return lduw_phys_internal(addr, DEVICE_LITTLE_ENDIAN);

}


--- a/source.c
+++ b/source.c
@@ -8,7 +8,7 @@

     s = (VirtIOBalloon *)virtio_common_init("virtio-balloon",

+                                            VIRTIO_ID_BALLOON,

                                             8, sizeof(VirtIOBalloon));

VirtIODevice *virtio_balloon_init(DeviceState *dev)

{

    VirtIOBalloon *s;

    s = (VirtIOBalloon *)virtio_common_init("virtio-balloon",

                                            VIRTIO_ID_BALLOON,

                                            8, sizeof(VirtIOBalloon));

    s->vdev.get_config = virtio_balloon_get_config;

    s->vdev.set_config = virtio_balloon_set_config;

    s->vdev.get_features = virtio_balloon_get_features;

    s->ivq = virtio_add_queue(&s->vdev, 128, virtio_balloon_handle_output);

    s->dvq = virtio_add_queue(&s->vdev, 128, virtio_balloon_handle_output);

    s->svq = virtio_add_queue(&s->vdev, 128, virtio_balloon_receive_stats);

    reset_stats(s);

    qemu_add_balloon_handler(virtio_balloon_to_target, s);

    register_savevm(dev, "virtio-balloon", -1, 1,

                    virtio_balloon_save, virtio_balloon_load, s);

    return &s->vdev;

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
+static void store_slice16_c(uint16_t *dst, const uint16_t *src,

                             int dst_linesize, int src_linesize,

+                            int width, int height, int log2_scale,

                             const uint8_t dither[8][8])

static void store_slice16_c(uint16_t *dst, const uint16_t *src,

                            int dst_linesize, int src_linesize,

                            int width, int height, int log2_scale,

                            const uint8_t dither[8][8])

{

    int y, x;

#define STORE16(pos) do {                                                   \

    temp = ((src[x + y*src_linesize + pos] << log2_scale) + (d[pos]>>1)) >> 5;   \

    if (temp & 0x400)                                                       \

        temp = ~(temp >> 31);                                               \

    dst[x + y*dst_linesize + pos] = temp;                                   \

} while (0)

    for (y = 0; y < height; y++) {

        const uint8_t *d = dither[y];

        for (x = 0; x < width; x += 8) {

            int temp;

            STORE16(0);

            STORE16(1);

            STORE16(2);

            STORE16(3);

            STORE16(4);

            STORE16(5);

            STORE16(6);

            STORE16(7);

        }

    }

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 static void xen_hvm_change_state_handler(void *opaque, int running,

+                                         RunState rstate)

 {

static void xen_hvm_change_state_handler(void *opaque, int running,

                                         RunState rstate)

{

    if (running) {

        xen_main_loop_prepare((XenIOState *)opaque);

    }

}


--- a/source.c
+++ b/source.c
@@ -30,10 +30,10 @@

     if (s390_has_feat(S390_FEAT_GUARDED_STORAGE)) {

+        mcic |= MCIC_VB_GS;
+
+    }
+
+    return mcic;

 }

static uint64_t build_channel_report_mcic(void)

{

    uint64_t mcic;

    /* subclass: indicate channel report pending */

    mcic = MCIC_SC_CP |

    /* subclass modifiers: none */

    /* storage errors: none */

    /* validity bits: no damage */

        MCIC_VB_WP | MCIC_VB_MS | MCIC_VB_PM | MCIC_VB_IA | MCIC_VB_FP |

        MCIC_VB_GR | MCIC_VB_CR | MCIC_VB_ST | MCIC_VB_AR | MCIC_VB_PR |

        MCIC_VB_FC | MCIC_VB_CT | MCIC_VB_CC;

    if (s390_has_feat(S390_FEAT_VECTOR)) {

        mcic |= MCIC_VB_VR;

    }

    if (s390_has_feat(S390_FEAT_GUARDED_STORAGE)) {

        mcic |= MCIC_VB_GS;

    }

    return mcic;

}


--- a/source.c
+++ b/source.c
@@ -3,7 +3,7 @@
                         Plane *plane, const uint8_t *data, int32_t data_size,

                         int32_t strip_width)
+
 {

     Cell            curr_cell;

static int decode_plane(Indeo3DecodeContext *ctx, AVCodecContext *avctx,

                        Plane *plane, const uint8_t *data, int32_t data_size,

                        int32_t strip_width)

{

    Cell            curr_cell;

    int             num_vectors;

    /* each plane data starts with mc_vector_count field, */

    /* an optional array of motion vectors followed by the vq data */

    num_vectors = bytestream_get_le32(&data);

    ctx->mc_vectors  = num_vectors ? data : 0;

    /* init the bitreader */

    init_get_bits(&ctx->gb, &data[num_vectors * 2], data_size << 3);

    ctx->skip_bits   = 0;

    ctx->need_resync = 0;

    ctx->last_byte = data + data_size - 1;

    /* initialize the 1st cell and set its dimensions to whole plane */

    curr_cell.xpos   = curr_cell.ypos = 0;

    curr_cell.width  = plane->width  >> 2;

    curr_cell.height = plane->height >> 2;

    curr_cell.tree   = 0; // we are in the MC tree now

    curr_cell.mv_ptr = 0; // no motion vector = INTRA cell

    return parse_bintree(ctx, avctx, plane, INTRA_NULL, &curr_cell, CELL_STACK_MAX, strip_width);

}


--- a/source.c
+++ b/source.c
@@ -13,11 +13,11 @@
         if (bus->set_irq)

             break;
+
+        pci_dev = bus->parent_dev;
+
+    }
+
     bus->irq_count[irq_num] += change;

     bus->set_irq(bus->irq_opaque, irq_num, bus->irq_count[irq_num] != 0);

static void pci_change_irq_level(PCIDevice *pci_dev, int irq_num, int change)

{

    PCIBus *bus;

    for (;;) {

        bus = pci_dev->bus;

        irq_num = bus->map_irq(pci_dev, irq_num);

        if (bus->set_irq)

            break;

        pci_dev = bus->parent_dev;

    }

    bus->irq_count[irq_num] += change;

    bus->set_irq(bus->irq_opaque, irq_num, bus->irq_count[irq_num] != 0);

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 void qemu_mutex_lock(QemuMutex *mutex)
+
+{
+
     EnterCriticalSection(&mutex->lock);

void qemu_mutex_lock(QemuMutex *mutex)

{

    EnterCriticalSection(&mutex->lock);

    /* Win32 CRITICAL_SECTIONs are recursive.  Assert that we're not

     * using them as such.

     */

    assert(mutex->owner == 0);

    mutex->owner = GetCurrentThreadId();

}


--- a/source.c
+++ b/source.c
@@ -42,11 +42,11 @@

             access = ppc_hash32_pp_check(ctx->key, pp, ctx->nx);

+            /* Keep the matching PTE informations */
+
+            ctx->raddr = pte1;
+
+            ctx->prot = access;

             ret = ppc_hash32_check_prot(ctx->prot, rw, type);

static int pte_check_hash32(struct mmu_ctx_hash32 *ctx, target_ulong pte0,

                            target_ulong pte1, int h, int rw, int type)

{

    target_ulong mmask;

    int access, ret, pp;

    ret = -1;

    /* Check validity and table match */

    if ((pte0 & HPTE32_V_VALID) && (h == !!(pte0 & HPTE32_V_SECONDARY))) {

        /* Check vsid & api */

        mmask = PTE_CHECK_MASK;

        pp = pte1 & HPTE32_R_PP;

        if (HPTE32_V_COMPARE(pte0, ctx->ptem)) {

            if (ctx->raddr != (hwaddr)-1ULL) {

                /* all matches should have equal RPN, WIMG & PP */

                if ((ctx->raddr & mmask) != (pte1 & mmask)) {

                    qemu_log("Bad RPN/WIMG/PP\n");

                    return -3;

                }

            }

            /* Compute access rights */

            access = ppc_hash32_pp_check(ctx->key, pp, ctx->nx);

            /* Keep the matching PTE informations */

            ctx->raddr = pte1;

            ctx->prot = access;

            ret = ppc_hash32_check_prot(ctx->prot, rw, type);

            if (ret == 0) {

                /* Access granted */

                LOG_MMU("PTE access granted !\n");

            } else {

                /* Access right violation */

                LOG_MMU("PTE access rejected\n");

            }

        }

    }

    return ret;

}


--- a/source.c
+++ b/source.c
@@ -7,11 +7,11 @@
                                    gpointer opaque,

                                    GDestroyNotify notify)
+
+{
+
+    QIOTask *task;
+
     struct QIODNSResolverLookupData *data =

         g_new0(struct QIODNSResolverLookupData, 1);

void qio_dns_resolver_lookup_async(QIODNSResolver *resolver,

                                   SocketAddress *addr,

                                   QIOTaskFunc func,

                                   gpointer opaque,

                                   GDestroyNotify notify)

{

    QIOTask *task;

    struct QIODNSResolverLookupData *data =

        g_new0(struct QIODNSResolverLookupData, 1);

    data->addr = QAPI_CLONE(SocketAddress, addr);

    task = qio_task_new(OBJECT(resolver), func, opaque, notify);

    qio_task_run_in_thread(task,

                           qio_dns_resolver_lookup_worker,

                           data,

                           qio_dns_resolver_lookup_data_free);

}


static int rle_unpack(unsigned char *src, unsigned char *dest, int len)

{

    unsigned char *ps;

    unsigned char *pd;

    int i, l;

    ps = src;

    pd = dest;

    if (len & 1)

        *pd++ = *ps++;

    len >>= 1;

    i = 0;

    do {

        l = *ps++;

        if (l & 0x80) {

            l = (l & 0x7F) * 2;

            memcpy(pd, ps, l);

            ps += l;

            pd += l;

        } else {

            for (i = 0; i < l; i++) {

                *pd++ = ps[0];

                *pd++ = ps[1];

            }

            ps += 2;

        }

        i += l;

    } while (i < len);

    return (ps - src);

}


--- a/source.c
+++ b/source.c
@@ -13,11 +13,11 @@
     /*

      * BIOS does not set MTRR entries for the 64 bit window, so no need to
+
+     * align address to power of two.  Align address at 1G, this makes sure
+
+     * it can be exactly covered with a PAT entry even when using huge
+
      * pages.

      */

void pc_init_pci64_hole(PcPciInfo *pci_info, uint64_t pci_hole64_start,

                        uint64_t pci_hole64_size)

{

    if ((sizeof(hwaddr) == 4) || (!pci_hole64_size)) {

        return;

    }

    /*

     * BIOS does not set MTRR entries for the 64 bit window, so no need to

     * align address to power of two.  Align address at 1G, this makes sure

     * it can be exactly covered with a PAT entry even when using huge

     * pages.

     */

    pci_info->w64.begin = ROUND_UP(pci_hole64_start, 0x1ULL << 30);

    pci_info->w64.end = pci_info->w64.begin + pci_hole64_size;

    assert(pci_info->w64.begin <= pci_info->w64.end);

}


--- a/source.c
+++ b/source.c
@@ -1,4 +1,4 @@
+static int mxf_read_source_clip(MXFStructuralComponent *source_clip, ByteIOContext *pb, int tag)

 {

static int mxf_read_source_clip(MXFStructuralComponent *source_clip, ByteIOContext *pb, int tag)

{

    switch(tag) {

    case 0x0202:

        source_clip->duration = get_be64(pb);

        break;

    case 0x1201:

        source_clip->start_position = get_be64(pb);

        break;

    case 0x1101:

        /* UMID, only get last 16 bytes */

        url_fskip(pb, 16);

        get_buffer(pb, source_clip->source_package_uid, 16);

        break;

    case 0x1102:

        source_clip->source_track_id = get_be32(pb);

        break;

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,25 +1,25 @@
 void HELPER(window_check)(CPUXtensaState *env, uint32_t pc, uint32_t w)

+{
+
+    uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);

     uint32_t windowstart = env->sregs[WINDOW_START];
+
+    uint32_t m, n;

+
+    if ((env->sregs[PS] & (PS_WOE | PS_EXCM)) ^ PS_WOE) {

         return;
+
     }

+
     for (n = 1; ; ++n) {
+
         if (n > w) {

             return;

void HELPER(window_check)(CPUXtensaState *env, uint32_t pc, uint32_t w)

{

    uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);

    uint32_t windowstart = env->sregs[WINDOW_START];

    uint32_t m, n;

    if ((env->sregs[PS] & (PS_WOE | PS_EXCM)) ^ PS_WOE) {

        return;

    }

    for (n = 1; ; ++n) {

        if (n > w) {

            return;

        }

        if (windowstart & windowstart_bit(windowbase + n, env)) {

            break;

        }

    }

    m = windowbase_bound(windowbase + n, env);

    rotate_window(env, n);

    env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) |

        (windowbase << PS_OWB_SHIFT) | PS_EXCM;

    env->sregs[EPC1] = env->pc = pc;

    if (windowstart & windowstart_bit(m + 1, env)) {

        HELPER(exception)(env, EXC_WINDOW_OVERFLOW4);

    } else if (windowstart & windowstart_bit(m + 2, env)) {

        HELPER(exception)(env, EXC_WINDOW_OVERFLOW8);

    } else {

        HELPER(exception)(env, EXC_WINDOW_OVERFLOW12);

    }

}


--- a/source.c
+++ b/source.c
@@ -17,11 +17,11 @@
     switch (index) {

     case PI_SR:
+
+    case PO_SR:
+
+    case MC_SR:
+
         r = &s->bm_regs[GET_BM (index)];

         val = r->sr;

static uint32_t nabm_readw (void *opaque, uint32_t addr)

{

    PCIAC97LinkState *d = opaque;

    AC97LinkState *s = &d->ac97;

    AC97BusMasterRegs *r = NULL;

    uint32_t index = addr - s->base[1];

    uint32_t val = ~0U;

    switch (index) {

    case PI_SR:

    case PO_SR:

    case MC_SR:

        r = &s->bm_regs[GET_BM (index)];

        val = r->sr;

        dolog ("SR[%d] -> %#x\n", GET_BM (index), val);

        break;

    case PI_PICB:

    case PO_PICB:

    case MC_PICB:

        r = &s->bm_regs[GET_BM (index)];

        val = r->picb;

        dolog ("PICB[%d] -> %#x\n", GET_BM (index), val);

        break;

    default:

        dolog ("U nabm readw %#x -> %#x\n", addr, val);

        break;

    }

    return val;

}


--- a/source.c
+++ b/source.c
@@ -24,11 +24,11 @@

     c[PCI_SUBSYSTEM_VENDOR_ID + 1] = 0x49;

+    c[PCI_SUBSYSTEM_ID] = 0x4c;
+
+    c[PCI_SUBSYSTEM_ID + 1] = 0x4c;
+
+#else

     c[PCI_SUBSYSTEM_VENDOR_ID] = 0x74;

static int es1370_initfn (PCIDevice *dev)

{

    ES1370State *s = DO_UPCAST (ES1370State, dev, dev);

    uint8_t *c = s->dev.config;

    pci_config_set_vendor_id (c, PCI_VENDOR_ID_ENSONIQ);

    pci_config_set_device_id (c, PCI_DEVICE_ID_ENSONIQ_ES1370);

    c[PCI_STATUS + 1] = PCI_STATUS_DEVSEL_SLOW >> 8;

    pci_config_set_class (c, PCI_CLASS_MULTIMEDIA_AUDIO);

#if 1

    c[PCI_SUBSYSTEM_VENDOR_ID] = 0x42;

    c[PCI_SUBSYSTEM_VENDOR_ID + 1] = 0x49;

    c[PCI_SUBSYSTEM_ID] = 0x4c;

    c[PCI_SUBSYSTEM_ID + 1] = 0x4c;

#else

    c[PCI_SUBSYSTEM_VENDOR_ID] = 0x74;

    c[PCI_SUBSYSTEM_VENDOR_ID + 1] = 0x12;

    c[PCI_SUBSYSTEM_ID] = 0x71;

    c[PCI_SUBSYSTEM_ID + 1] = 0x13;

    c[PCI_CAPABILITY_LIST] = 0xdc;

    c[PCI_INTERRUPT_LINE] = 10;

    c[0xdc] = 0x00;

#endif

    /* TODO: RST# value should be 0. */

    c[PCI_INTERRUPT_PIN] = 1;

    c[PCI_MIN_GNT] = 0x0c;

    c[PCI_MAX_LAT] = 0x80;

    pci_register_bar (&s->dev, 0, 256, PCI_BASE_ADDRESS_SPACE_IO, es1370_map);

    qemu_register_reset (es1370_on_reset, s);

    AUD_register_card ("es1370", &s->card);

    es1370_reset (s);

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -5,11 +5,11 @@
     switch (page) {

     case MODE_PAGE_CACHING:
+
+        bdrv_set_enable_write_cache(s->qdev.conf.bs, (p[0] & 4) != 0);
+
+        break;
+

     default:

static void scsi_disk_apply_mode_select(SCSIDiskState *s, int page, uint8_t *p)

{

    switch (page) {

    case MODE_PAGE_CACHING:

        bdrv_set_enable_write_cache(s->qdev.conf.bs, (p[0] & 4) != 0);

        break;

    default:

        break;

    }

}


--- a/source.c
+++ b/source.c
@@ -12,14 +12,14 @@

             band->zero_mem[k] = ((band->zero_mem[k] * 255) >> 8) + \

+               d*((band->diff_mem[k]^cur_diff) < 0 ? -128 : 128); \

             band->diff_mem[k] = tmp; \

             s_zero += (tmp * band->zero_mem[k]) >> 15; \

         } while (0)
+
     if (cur_diff) {

         ACCUM(5, band->diff_mem[4], 1);

static inline void s_zero(int cur_diff, struct G722Band *band)

{

    int s_zero = 0;

    #define ACCUM(k, x, d) do { \

            int tmp = x; \

            band->zero_mem[k] = ((band->zero_mem[k] * 255) >> 8) + \

               d*((band->diff_mem[k]^cur_diff) < 0 ? -128 : 128); \

            band->diff_mem[k] = tmp; \

            s_zero += (tmp * band->zero_mem[k]) >> 15; \

        } while (0)

    if (cur_diff) {

        ACCUM(5, band->diff_mem[4], 1);

        ACCUM(4, band->diff_mem[3], 1);

        ACCUM(3, band->diff_mem[2], 1);

        ACCUM(2, band->diff_mem[1], 1);

        ACCUM(1, band->diff_mem[0], 1);

        ACCUM(0, cur_diff << 1, 1);

    } else {

        ACCUM(5, band->diff_mem[4], 0);

        ACCUM(4, band->diff_mem[3], 0);

        ACCUM(3, band->diff_mem[2], 0);

        ACCUM(2, band->diff_mem[1], 0);

        ACCUM(1, band->diff_mem[0], 0);

        ACCUM(0, cur_diff << 1, 0);

    }

    #undef ACCUM

    band->s_zero = s_zero;

}


--- a/source.c
+++ b/source.c
@@ -3,10 +3,10 @@
 {

     SDState *sd = opaque;
+
+
+
+    qemu_set_irq(sd->inserted_cb, blk_is_inserted(sd->blk));

     if (blk_is_inserted(sd->blk)) {

static void sd_cardchange(void *opaque, bool load)

{

    SDState *sd = opaque;

    qemu_set_irq(sd->inserted_cb, blk_is_inserted(sd->blk));

    if (blk_is_inserted(sd->blk)) {

        sd_reset(DEVICE(sd));

        qemu_set_irq(sd->readonly_cb, sd->wp_switch);

    }

}


--- a/source.c
+++ b/source.c
@@ -60,10 +60,10 @@

     return;

+
+
+error_out:
+
+    return;

 }

void kvmppc_hash64_write_pte(CPUPPCState *env, target_ulong pte_index,

                             target_ulong pte0, target_ulong pte1)

{

    int htab_fd;

    struct kvm_get_htab_fd ghf;

    struct kvm_get_htab_buf hpte_buf;

    ghf.flags = 0;

    ghf.start_index = 0;     /* Ignored */

    htab_fd = kvm_vm_ioctl(kvm_state, KVM_PPC_GET_HTAB_FD, &ghf);

    if (htab_fd < 0) {

        goto error_out;

    }

    hpte_buf.header.n_valid = 1;

    hpte_buf.header.n_invalid = 0;

    hpte_buf.header.index = pte_index;

    hpte_buf.hpte[0] = pte0;

    hpte_buf.hpte[1] = pte1;

    /*

     * Write the hpte entry.

     * CAUTION: write() has the warn_unused_result attribute. Hence we

     * need to check the return value, even though we do nothing.

     */

    if (write(htab_fd, &hpte_buf, sizeof(hpte_buf)) < 0) {

        goto out_close;

    }

out_close:

    close(htab_fd);

    return;

error_out:

    return;

}


--- a/source.c
+++ b/source.c
@@ -45,11 +45,11 @@

                                   ctrl);

+    s->event_vq = virtio_add_queue(vdev, VIRTIO_SCSI_VQ_SIZE,
+
+                                   evt);
+
+    for (i = 0; i < s->conf.num_queues; i++) {

         s->cmd_vqs[i] = virtio_add_queue(vdev, VIRTIO_SCSI_VQ_SIZE,

void virtio_scsi_common_realize(DeviceState *dev, Error **errp,

                                HandleOutput ctrl, HandleOutput evt,

                                HandleOutput cmd)

{

    VirtIODevice *vdev = VIRTIO_DEVICE(dev);

    VirtIOSCSICommon *s = VIRTIO_SCSI_COMMON(dev);

    int i;

    virtio_init(vdev, "virtio-scsi", VIRTIO_ID_SCSI,

                sizeof(VirtIOSCSIConfig));

    if (s->conf.num_queues <= 0 || s->conf.num_queues > VIRTIO_PCI_QUEUE_MAX) {

        error_setg(errp, "Invalid number of queues (= %" PRId32 "), "

                         "must be a positive integer less than %d.",

                   s->conf.num_queues, VIRTIO_PCI_QUEUE_MAX);

        return;

    }

    s->cmd_vqs = g_malloc0(s->conf.num_queues * sizeof(VirtQueue *));

    s->sense_size = VIRTIO_SCSI_SENSE_SIZE;

    s->cdb_size = VIRTIO_SCSI_CDB_SIZE;

    s->ctrl_vq = virtio_add_queue(vdev, VIRTIO_SCSI_VQ_SIZE,

                                  ctrl);

    s->event_vq = virtio_add_queue(vdev, VIRTIO_SCSI_VQ_SIZE,

                                   evt);

    for (i = 0; i < s->conf.num_queues; i++) {

        s->cmd_vqs[i] = virtio_add_queue(vdev, VIRTIO_SCSI_VQ_SIZE,

                                         cmd);

    }

    if (s->conf.iothread) {

        virtio_scsi_set_iothread(VIRTIO_SCSI(s), s->conf.iothread);

    }

}


--- a/source.c
+++ b/source.c
@@ -1,11 +1,11 @@
 static int kvm_set_ioeventfd_mmio(int fd, hwaddr addr, uint32_t val,

+                                  bool assign, uint32_t size, bool datamatch)
+
+{
+
+    int ret;
+
     struct kvm_ioeventfd iofd;

static int kvm_set_ioeventfd_mmio(int fd, hwaddr addr, uint32_t val,

                                  bool assign, uint32_t size, bool datamatch)

{

    int ret;

    struct kvm_ioeventfd iofd;

    iofd.datamatch = datamatch ? adjust_ioeventfd_endianness(val, size) : 0;

    iofd.addr = addr;

    iofd.len = size;

    iofd.flags = 0;

    iofd.fd = fd;

    if (!kvm_enabled()) {

        return -ENOSYS;

    }

    if (datamatch) {

        iofd.flags |= KVM_IOEVENTFD_FLAG_DATAMATCH;

    }

    if (!assign) {

        iofd.flags |= KVM_IOEVENTFD_FLAG_DEASSIGN;

    }

    ret = kvm_vm_ioctl(kvm_state, KVM_IOEVENTFD, &iofd);

    if (ret < 0) {

        return -errno;

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -21,11 +21,11 @@
         return 0;

     }
+
+    aSign = extractFloat64Sign( a );
+
+    bSign = extractFloat64Sign( b );
+
     if ( aSign != bSign ) return aSign && ( (bits64) ( ( a | b )<<1 ) != 0 );

     return ( a != b ) && ( aSign ^ ( a < b ) );

int float64_lt_quiet( float64 a, float64 b STATUS_PARAM )

{

    flag aSign, bSign;

    if (    ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )

         || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )

       ) {

        if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {

            float_raise( float_flag_invalid STATUS_VAR);

        }

        return 0;

    }

    aSign = extractFloat64Sign( a );

    bSign = extractFloat64Sign( b );

    if ( aSign != bSign ) return aSign && ( (bits64) ( ( a | b )<<1 ) != 0 );

    return ( a != b ) && ( aSign ^ ( a < b ) );

}


--- a/source.c
+++ b/source.c
@@ -8,11 +8,11 @@

     async_context_push();

+
+
+    qed_read_table(s, s->header.l1_table_offset,
+
+                   s->l1_table, qed_sync_cb, &ret);

     while (ret == -EINPROGRESS) {

int qed_read_l1_table_sync(BDRVQEDState *s)

{

    int ret = -EINPROGRESS;

    async_context_push();

    qed_read_table(s, s->header.l1_table_offset,

                   s->l1_table, qed_sync_cb, &ret);

    while (ret == -EINPROGRESS) {

        qemu_aio_wait();

    }

    async_context_pop();

    return ret;

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 float32 HELPER(ucf64_si2sf)(float32 x, CPUUniCore32State *env)

 {
+
     return int32_to_float32(ucf64_stoi(x), &env->ucf64.fp_status);

 }

float32 HELPER(ucf64_si2sf)(float32 x, CPUUniCore32State *env)

{

    return int32_to_float32(ucf64_stoi(x), &env->ucf64.fp_status);

}


--- a/source.c
+++ b/source.c
@@ -10,7 +10,7 @@

         [GDB_WATCHPOINT_ACCESS] = 0x3

+    };

     const uint8_t len_code[] = {

void kvm_arch_update_guest_debug(CPUState *env, struct kvm_guest_debug *dbg)

{

    const uint8_t type_code[] = {

        [GDB_BREAKPOINT_HW] = 0x0,

        [GDB_WATCHPOINT_WRITE] = 0x1,

        [GDB_WATCHPOINT_ACCESS] = 0x3

    };

    const uint8_t len_code[] = {

        [1] = 0x0, [2] = 0x1, [4] = 0x3, [8] = 0x2

    };

    int n;

    if (kvm_sw_breakpoints_active(env))

        dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;

    if (nb_hw_breakpoint > 0) {

        dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP;

        dbg->arch.debugreg[7] = 0x0600;

        for (n = 0; n < nb_hw_breakpoint; n++) {

            dbg->arch.debugreg[n] = hw_breakpoint[n].addr;

            dbg->arch.debugreg[7] |= (2 << (n * 2)) |

                (type_code[hw_breakpoint[n].type] << (16 + n*4)) |

                (len_code[hw_breakpoint[n].len] << (18 + n*4));

        }

    }

    /* Legal xcr0 for loading */

    env->xcr0 = 1;

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 void qemu_chr_add_handlers(CharDriverState *s,

+                           IOCanReadHandler *fd_can_read,

                            IOReadHandler *fd_read,

void qemu_chr_add_handlers(CharDriverState *s,

                           IOCanReadHandler *fd_can_read,

                           IOReadHandler *fd_read,

                           IOEventHandler *fd_event,

                           void *opaque)

{

    if (!opaque) {

        /* chr driver being released. */

        s->assigned = 0;

    }

    s->chr_can_read = fd_can_read;

    s->chr_read = fd_read;

    s->chr_event = fd_event;

    s->handler_opaque = opaque;

    if (s->chr_update_read_handler)

        s->chr_update_read_handler(s);

    /* We're connecting to an already opened device, so let's make sure we

       also get the open event */

    if (s->opened) {

        qemu_chr_generic_open(s);

    }

}


--- a/source.c
+++ b/source.c
@@ -10,11 +10,11 @@

 #ifndef CONFIG_USER_ONLY

+    cpu_remove_sync(CPU(dev));
+
+    qemu_unregister_reset(x86_cpu_machine_reset_cb, dev);
+
+#endif

static void x86_cpu_unrealizefn(DeviceState *dev, Error **errp)

{

    X86CPU *cpu = X86_CPU(dev);

#ifndef CONFIG_USER_ONLY

    cpu_remove_sync(CPU(dev));

    qemu_unregister_reset(x86_cpu_machine_reset_cb, dev);

#endif

    if (cpu->apic_state) {

        object_unparent(OBJECT(cpu->apic_state));

        cpu->apic_state = NULL;

    }

    xcc->parent_unrealize(dev, &local_err);

    if (local_err != NULL) {

        error_propagate(errp, local_err);

        return;

    }

}


--- a/source.c
+++ b/source.c
@@ -8,7 +8,7 @@

+    width = st->codec->width;

     height = st->codec->height;

static int rawvideo_read_packet(AVFormatContext *s, AVPacket *pkt)

{

    int packet_size, ret, width, height;

    AVStream *st = s->streams[0];

    width = st->codec->width;

    height = st->codec->height;

    packet_size = avpicture_get_size(st->codec->pix_fmt, width, height);

    if (packet_size < 0)

        return -1;

    ret= av_get_packet(s->pb, pkt, packet_size);

    pkt->pts=

    pkt->dts= pkt->pos / packet_size;

    pkt->stream_index = 0;

    if (ret != packet_size)

        return AVERROR(EIO);

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 static void test_ivshmem_memdev(void)

 {
+
     IVState state;

static void test_ivshmem_memdev(void)

{

    IVState state;

    /* just for the sake of checking memory-backend property */

    setup_vm_cmd(&state, "-object memory-backend-ram,size=1M,id=mb1"

                 " -device ivshmem,x-memdev=mb1", false);

    qtest_quit(state.qtest);

}


--- a/source.c
+++ b/source.c
@@ -15,11 +15,11 @@
     /* Check validity and table match */

     if ((pte0 & HPTE64_V_VALID) && (h == !!(pte0 & HPTE64_V_SECONDARY))) {
+
+        /* Check vsid & api */
+
+        mmask = PTE64_CHECK_MASK;
+
         pp = (pte1 & HPTE64_R_PP) | ((pte1 & HPTE64_R_PP0) >> 61);

         /* No execute if either noexec or guarded bits set */

static int pte64_check(struct mmu_ctx_hash64 *ctx, target_ulong pte0,

                       target_ulong pte1, int h, int rw, int type)

{

    target_ulong mmask;

    int access, ret, pp;

    ret = -1;

    /* Check validity and table match */

    if ((pte0 & HPTE64_V_VALID) && (h == !!(pte0 & HPTE64_V_SECONDARY))) {

        /* Check vsid & api */

        mmask = PTE64_CHECK_MASK;

        pp = (pte1 & HPTE64_R_PP) | ((pte1 & HPTE64_R_PP0) >> 61);

        /* No execute if either noexec or guarded bits set */

        ctx->nx = (pte1 & HPTE64_R_N) || (pte1 & HPTE64_R_G);

        if (HPTE64_V_COMPARE(pte0, ctx->ptem)) {

            if (ctx->raddr != (hwaddr)-1ULL) {

                /* all matches should have equal RPN, WIMG & PP */

                if ((ctx->raddr & mmask) != (pte1 & mmask)) {

                    qemu_log("Bad RPN/WIMG/PP\n");

                    return -3;

                }

            }

            /* Compute access rights */

            access = ppc_hash64_pp_check(ctx->key, pp, ctx->nx);

            /* Keep the matching PTE informations */

            ctx->raddr = pte1;

            ctx->prot = access;

            ret = ppc_hash64_check_prot(ctx->prot, rw, type);

            if (ret == 0) {

                /* Access granted */

                LOG_MMU("PTE access granted !\n");

            } else {

                /* Access right violation */

                LOG_MMU("PTE access rejected\n");

            }

        }

    }

    return ret;

}


--- a/source.c
+++ b/source.c
@@ -5,5 +5,5 @@
     gen_update_nip(ctx, ctx->nip);

     ctx->exception = EXCP_MTMSR;
+
+}

static inline void RET_STOP (DisasContext *ctx)

{

    gen_update_nip(ctx, ctx->nip);

    ctx->exception = EXCP_MTMSR;

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
 static av_cold int png_enc_close(AVCodecContext *avctx)

 {
+
+    av_frame_free(&avctx->coded_frame);

     return 0;

static av_cold int png_enc_close(AVCodecContext *avctx)

{

    av_frame_free(&avctx->coded_frame);

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,4 +1,4 @@
+static inline void RENAME(bgr24ToUV)(uint8_t *dstU, uint8_t *dstV, const uint8_t *src1, const uint8_t *src2, int width, uint32_t *unused)

 {

static inline void RENAME(bgr24ToUV)(uint8_t *dstU, uint8_t *dstV, const uint8_t *src1, const uint8_t *src2, int width, uint32_t *unused)

{

#if COMPILE_TEMPLATE_MMX

    RENAME(bgr24ToUV_mmx)(dstU, dstV, src1, width, PIX_FMT_BGR24);

#else

    int i;

    for (i=0; i<width; i++) {

        int b= src1[3*i + 0];

        int g= src1[3*i + 1];

        int r= src1[3*i + 2];

        dstU[i]= (RU*r + GU*g + BU*b + (257<<(RGB2YUV_SHIFT-1)))>>RGB2YUV_SHIFT;

        dstV[i]= (RV*r + GV*g + BV*b + (257<<(RGB2YUV_SHIFT-1)))>>RGB2YUV_SHIFT;

    }

#endif /* COMPILE_TEMPLATE_MMX */

    assert(src1 == src2);

}


--- a/source.c
+++ b/source.c
@@ -18,11 +18,11 @@

                        : drv->bdrv_save_vmstate(bs, qiov, pos);

+    } else if (bs->file) {
+
+        return bdrv_co_rw_vmstate(bs->file->bs, qiov, pos, is_read);
+
+    }

bdrv_co_rw_vmstate(BlockDriverState *bs, QEMUIOVector *qiov, int64_t pos,

                   bool is_read)

{

    BlockDriver *drv = bs->drv;

    if (!drv) {

        return -ENOMEDIUM;

    } else if (drv->bdrv_load_vmstate) {

        return is_read ? drv->bdrv_load_vmstate(bs, qiov, pos)

                       : drv->bdrv_save_vmstate(bs, qiov, pos);

    } else if (bs->file) {

        return bdrv_co_rw_vmstate(bs->file->bs, qiov, pos, is_read);

    }

    return -ENOTSUP;

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 void exynos4210_init_board_irqs(Exynos4210Irq *s)

 {
+
     uint32_t grp, bit, irq_id, n;

void exynos4210_init_board_irqs(Exynos4210Irq *s)

{

    uint32_t grp, bit, irq_id, n;

    for (n = 0; n < EXYNOS4210_MAX_EXT_COMBINER_IN_IRQ; n++) {

        s->board_irqs[n] = qemu_irq_split(s->int_combiner_irq[n],

                s->ext_combiner_irq[n]);

        irq_id = 0;

        if (n == EXYNOS4210_COMBINER_GET_IRQ_NUM(1, 4) ||

                n == EXYNOS4210_COMBINER_GET_IRQ_NUM(12, 4)) {

            /* MCT_G0 is passed to External GIC */

            irq_id = EXT_GIC_ID_MCT_G0;

        }

        if (n == EXYNOS4210_COMBINER_GET_IRQ_NUM(1, 5) ||

                n == EXYNOS4210_COMBINER_GET_IRQ_NUM(12, 5)) {

            /* MCT_G1 is passed to External and GIC */

            irq_id = EXT_GIC_ID_MCT_G1;

        }

        if (irq_id) {

            s->board_irqs[n] = qemu_irq_split(s->int_combiner_irq[n],

                    s->ext_gic_irq[irq_id-32]);

        }

    }

    for (; n < EXYNOS4210_MAX_INT_COMBINER_IN_IRQ; n++) {

        /* these IDs are passed to Internal Combiner and External GIC */

        grp = EXYNOS4210_COMBINER_GET_GRP_NUM(n);

        bit = EXYNOS4210_COMBINER_GET_BIT_NUM(n);

        irq_id = combiner_grp_to_gic_id[grp -

                     EXYNOS4210_MAX_EXT_COMBINER_OUT_IRQ][bit];

        if (irq_id) {

            s->board_irqs[n] = qemu_irq_split(s->int_combiner_irq[n],

                    s->ext_gic_irq[irq_id-32]);

        }

    }

}


--- a/source.c
+++ b/source.c
@@ -1,5 +1,5 @@
 static struct omap_eac_s *omap_eac_init(struct omap_target_agent_s *ta,
+
                 qemu_irq irq, qemu_irq *drq, omap_clk fclk, omap_clk iclk)

 {

static struct omap_eac_s *omap_eac_init(struct omap_target_agent_s *ta,

                qemu_irq irq, qemu_irq *drq, omap_clk fclk, omap_clk iclk)

{

    struct omap_eac_s *s = (struct omap_eac_s *)

            g_malloc0(sizeof(struct omap_eac_s));

    s->irq = irq;

    s->codec.rxdrq = *drq ++;

    s->codec.txdrq = *drq;

    omap_eac_reset(s);

    AUD_register_card("OMAP EAC", &s->codec.card);

    memory_region_init_io(&s->iomem, NULL, &omap_eac_ops, s, "omap.eac",

                          omap_l4_region_size(ta, 0));

    omap_l4_attach(ta, 0, &s->iomem);

    return s;

}


void qemu_iovec_add(QEMUIOVector *qiov, void *base, size_t len)

{

    assert(qiov->nalloc != -1);

    if (qiov->niov == qiov->nalloc) {

        qiov->nalloc = 2 * qiov->nalloc + 1;

        qiov->iov = g_realloc(qiov->iov, qiov->nalloc * sizeof(struct iovec));

    }

    qiov->iov[qiov->niov].iov_base = base;

    qiov->iov[qiov->niov].iov_len = len;

    qiov->size += len;

    ++qiov->niov;

}


--- a/source.c
+++ b/source.c
@@ -1,14 +1,14 @@
+static XICSState *xics_system_init(int nr_servers, int nr_irqs)

 {
+
+    XICSState *icp = NULL;
+

+
     if (kvm_enabled()) {

+        QemuOpts *machine_opts = qemu_get_machine_opts();

         bool irqchip_allowed = qemu_opt_get_bool(machine_opts,

static XICSState *xics_system_init(int nr_servers, int nr_irqs)

{

    XICSState *icp = NULL;

    if (kvm_enabled()) {

        QemuOpts *machine_opts = qemu_get_machine_opts();

        bool irqchip_allowed = qemu_opt_get_bool(machine_opts,

                                                "kernel_irqchip", true);

        bool irqchip_required = qemu_opt_get_bool(machine_opts,

                                                  "kernel_irqchip", false);

        Error *err = NULL;

        if (irqchip_allowed) {

            icp = try_create_xics(TYPE_KVM_XICS, nr_servers, nr_irqs, &err);

        }

        if (irqchip_required && !icp) {

            error_report("kernel_irqchip requested but unavailable: %s",

                         error_get_pretty(err));

        }

    }

    if (!icp) {

        icp = try_create_xics(TYPE_XICS, nr_servers, nr_irqs, &error_abort);

    }

    return icp;

}


--- a/source.c
+++ b/source.c
@@ -1,10 +1,10 @@
+uint64_t helper_subqv (uint64_t op1, uint64_t op2)
+
+{
+
+    uint64_t res;

+    res = op1 - op2;

     if (unlikely((op1 ^ op2) & (res ^ op1) & (1ULL << 63))) {

uint64_t helper_subqv (uint64_t op1, uint64_t op2)

{

    uint64_t res;

    res = op1 - op2;

    if (unlikely((op1 ^ op2) & (res ^ op1) & (1ULL << 63))) {

        arith_excp(env, GETPC(), EXC_M_IOV, 0);

    }

    return res;

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 static void vhost_user_stop(VhostUserState *s)
+
+{
+
     if (vhost_user_running(s)) {

         vhost_net_cleanup(s->vhost_net);

static void vhost_user_stop(VhostUserState *s)

{

    if (vhost_user_running(s)) {

        vhost_net_cleanup(s->vhost_net);

    }

    s->vhost_net = 0;

}


--- a/source.c
+++ b/source.c
@@ -1,9 +1,9 @@
 static void omap_pwl_write(void *opaque, target_phys_addr_t addr,
+
+                           uint64_t value, unsigned size)
+
+{
+
     struct omap_pwl_s *s = (struct omap_pwl_s *) opaque;

     int offset = addr & OMAP_MPUI_REG_MASK;

static void omap_pwl_write(void *opaque, target_phys_addr_t addr,

                           uint64_t value, unsigned size)

{

    struct omap_pwl_s *s = (struct omap_pwl_s *) opaque;

    int offset = addr & OMAP_MPUI_REG_MASK;

    if (size != 1) {

        return omap_badwidth_write8(opaque, addr, value);

    }

    switch (offset) {

    case 0x00:	/* PWL_LEVEL */

        s->level = value;

        omap_pwl_update(s);

        break;

    case 0x04:	/* PWL_CTRL */

        s->enable = value & 1;

        omap_pwl_update(s);

        break;

    default:

        OMAP_BAD_REG(addr);

        return;

    }

}


--- a/source.c
+++ b/source.c
@@ -24,11 +24,11 @@

     } else {

+        QTAILQ_FOREACH(bp, &env->breakpoints, entry)
+
+            if (bp->pc == env->eip) {
+
+                if (bp->flags & BP_CPU) {

                     check_hw_breakpoints(env, 1);

static void breakpoint_handler(CPUX86State *env)

{

    CPUBreakpoint *bp;

    if (env->watchpoint_hit) {

        if (env->watchpoint_hit->flags & BP_CPU) {

            env->watchpoint_hit = NULL;

            if (check_hw_breakpoints(env, 0))

                raise_exception_env(EXCP01_DB, env);

            else

                cpu_resume_from_signal(env, NULL);

        }

    } else {

        QTAILQ_FOREACH(bp, &env->breakpoints, entry)

            if (bp->pc == env->eip) {

                if (bp->flags & BP_CPU) {

                    check_hw_breakpoints(env, 1);

                    raise_exception_env(EXCP01_DB, env);

                }

                break;

            }

    }

    if (prev_debug_excp_handler)

        prev_debug_excp_handler(env);

}


--- a/source.c
+++ b/source.c
@@ -7,7 +7,7 @@
     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);

+
     k->init = bonito_initfn;

     k->vendor_id = 0xdf53;

static void bonito_class_init(ObjectClass *klass, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(klass);

    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);

    k->init = bonito_initfn;

    k->vendor_id = 0xdf53;

    k->device_id = 0x00d5;

    k->revision = 0x01;

    k->class_id = PCI_CLASS_BRIDGE_HOST;

    dc->desc = "Host bridge";

    dc->no_user = 1;

    dc->vmsd = &vmstate_bonito;

}


--- a/source.c
+++ b/source.c
@@ -17,11 +17,11 @@
         port->dev = dev;

         port->ops->attach(port);
+
+        usb_send_msg(dev, USB_MSG_ATTACH);
+
+    } else {
+
         /* detach */

         dev = port->dev;

void usb_attach(USBPort *port, USBDevice *dev)

{

    if (dev != NULL) {

        /* attach */

        if (port->dev) {

            usb_attach(port, NULL);

        }

        dev->port = port;

        port->dev = dev;

        port->ops->attach(port);

        usb_send_msg(dev, USB_MSG_ATTACH);

    } else {

        /* detach */

        dev = port->dev;

        port->ops->detach(port);

        if (dev) {

            usb_send_msg(dev, USB_MSG_DETACH);

            dev->port = NULL;

            port->dev = NULL;

        }

    }

}


--- a/source.c
+++ b/source.c
@@ -7,11 +7,11 @@
     int pirq;

+
+    /* Because the i8259 has not been deserialized yet, qemu_irq_raise
+
+     * might bring the system to a different state than the saved one;
+
      * for example, the interrupt could be masked but the i8259 would

      * not know that yet and would trigger an interrupt in the CPU.

static int piix3_post_load(void *opaque, int version_id)

{

    PIIX3State *piix3 = opaque;

    int pirq;

    /* Because the i8259 has not been deserialized yet, qemu_irq_raise

     * might bring the system to a different state than the saved one;

     * for example, the interrupt could be masked but the i8259 would

     * not know that yet and would trigger an interrupt in the CPU.

     *

     * Here, we update irq levels without raising the interrupt.

     * Interrupt state will be deserialized separately through the i8259.

     */

    piix3->pic_levels = 0;

    for (pirq = 0; pirq < PIIX_NUM_PIRQS; pirq++) {

        piix3_set_irq_level_internal(piix3, pirq,

                            pci_bus_get_irq_level(piix3->dev.bus, pirq));

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -22,11 +22,11 @@

+        for(i = 1; i < TARGET_NSIG_WORDS; i++) {
+
+            if (__put_user(set->sig[i], &frame->extramask[i - 1]))
+
+                goto end;

 	}

static void setup_frame(int usig, struct emulated_sigaction *ka,

			target_sigset_t *set, CPUState *regs)

{

	struct sigframe *frame;

	abi_ulong frame_addr = get_sigframe(ka, regs, sizeof(*frame));

	int i, err = 0;

	if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0))

		return;

	err |= setup_sigcontext(&frame->sc, /*&frame->fpstate,*/ regs, set->sig[0]);

        for(i = 1; i < TARGET_NSIG_WORDS; i++) {

            if (__put_user(set->sig[i], &frame->extramask[i - 1]))

                goto end;

	}

	if (err == 0)

            err = setup_return(regs, ka, &frame->retcode, frame, usig);

end:

	unlock_user_struct(frame, frame_addr, 1);

        //	return err;

}


--- a/source.c
+++ b/source.c
@@ -23,7 +23,7 @@
     };

     char *tail;
+
     int level;

     int i;

int opt_loglevel(void *optctx, const char *opt, const char *arg)

{

    const struct { const char *name; int level; } log_levels[] = {

        { "quiet"  , AV_LOG_QUIET   },

        { "panic"  , AV_LOG_PANIC   },

        { "fatal"  , AV_LOG_FATAL   },

        { "error"  , AV_LOG_ERROR   },

        { "warning", AV_LOG_WARNING },

        { "info"   , AV_LOG_INFO    },

        { "verbose", AV_LOG_VERBOSE },

        { "debug"  , AV_LOG_DEBUG   },

    };

    char *tail;

    int level;

    int i;

    for (i = 0; i < FF_ARRAY_ELEMS(log_levels); i++) {

        if (!strcmp(log_levels[i].name, arg)) {

            av_log_set_level(log_levels[i].level);

            return 0;

        }

    }

    level = strtol(arg, &tail, 10);

    if (*tail) {

        av_log(NULL, AV_LOG_FATAL, "Invalid loglevel \"%s\". "

               "Possible levels are numbers or:\n", arg);

        for (i = 0; i < FF_ARRAY_ELEMS(log_levels); i++)

            av_log(NULL, AV_LOG_FATAL, "\"%s\"\n", log_levels[i].name);

        exit(1);

    }

    av_log_set_level(level);

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -18,11 +18,11 @@

         return -1;

+    }
+
+    if (read(fd, e_ident, sizeof(e_ident)) != sizeof(e_ident))
+
+        goto fail;

     if (e_ident[0] != ELFMAG0 ||

int load_elf(const char *filename, int64_t virt_to_phys_addend,

             uint64_t *pentry)

{

    int fd, data_order, must_swab, ret;

    uint8_t e_ident[EI_NIDENT];

    fd = open(filename, O_RDONLY | O_BINARY);

    if (fd < 0) {

        perror(filename);

        return -1;

    }

    if (read(fd, e_ident, sizeof(e_ident)) != sizeof(e_ident))

        goto fail;

    if (e_ident[0] != ELFMAG0 ||

        e_ident[1] != ELFMAG1 ||

        e_ident[2] != ELFMAG2 ||

        e_ident[3] != ELFMAG3)

        goto fail;

#ifdef WORDS_BIGENDIAN

    data_order = ELFDATA2MSB;

#else

    data_order = ELFDATA2LSB;

#endif

    must_swab = data_order != e_ident[EI_DATA];

    lseek(fd, 0, SEEK_SET);

    if (e_ident[EI_CLASS] == ELFCLASS64) {

        ret = load_elf64(fd, virt_to_phys_addend, must_swab, pentry);

    } else {

        ret = load_elf32(fd, virt_to_phys_addend, must_swab, pentry);

    }

    close(fd);

    return ret;

 fail:

    close(fd);

    return -1;

}


--- a/source.c
+++ b/source.c
@@ -5,11 +5,11 @@
 {

     switch (type) {
+
+    case GDB_BREAKPOINT_SW:
+
+    case GDB_BREAKPOINT_HW:
+
         return cpu_breakpoint_insert(env, addr, BP_GDB, NULL);

 #ifndef CONFIG_USER_ONLY

static int gdb_breakpoint_insert(CPUState *env, target_ulong addr,

                                 target_ulong len, int type)

{

    switch (type) {

    case GDB_BREAKPOINT_SW:

    case GDB_BREAKPOINT_HW:

        return cpu_breakpoint_insert(env, addr, BP_GDB, NULL);

#ifndef CONFIG_USER_ONLY

    case GDB_WATCHPOINT_WRITE:

    case GDB_WATCHPOINT_READ:

    case GDB_WATCHPOINT_ACCESS:

        return cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type],

                                     NULL);

#endif

    default:

        return -ENOSYS;

    }

}


--- a/source.c
+++ b/source.c
@@ -14,11 +14,11 @@

         page_size = 4096;

+    } else {
+
+        /* page directory entry */
+
+        pde_ptr = phys_ram_base +

             (((env->cr[3] & ~0xfff) + ((addr >> 20) & ~3)) & a20_mask);

target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr)

{

    uint8_t *pde_ptr, *pte_ptr;

    uint32_t pde, pte, paddr, page_offset, page_size;

    if (!(env->cr[0] & CR0_PG_MASK)) {

        pte = addr;

        page_size = 4096;

    } else {

        /* page directory entry */

        pde_ptr = phys_ram_base +

            (((env->cr[3] & ~0xfff) + ((addr >> 20) & ~3)) & a20_mask);

        pde = ldl_raw(pde_ptr);

        if (!(pde & PG_PRESENT_MASK))

            return -1;

        if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {

            pte = pde & ~0x003ff000; /* align to 4MB */

            page_size = 4096 * 1024;

        } else {

            /* page directory entry */

            pte_ptr = phys_ram_base +

                (((pde & ~0xfff) + ((addr >> 10) & 0xffc)) & a20_mask);

            pte = ldl_raw(pte_ptr);

            if (!(pte & PG_PRESENT_MASK))

                return -1;

            page_size = 4096;

        }

    }

    pte = pte & a20_mask;

    page_offset = (addr & TARGET_PAGE_MASK) & (page_size - 1);

    paddr = (pte & TARGET_PAGE_MASK) + page_offset;

    return paddr;

}


--- a/source.c
+++ b/source.c
@@ -3,9 +3,9 @@
                              void *opaque, Error **errp)

 {
+
+    S390CPU *cpu = S390_CPU(obj);
+
     int64_t value = cpu->id;

static void s390x_cpu_get_id(Object *obj, Visitor *v, const char *name,

                             void *opaque, Error **errp)

{

    S390CPU *cpu = S390_CPU(obj);

    int64_t value = cpu->id;

    visit_type_int(v, name, &value, errp);

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 static inline void gen_lookup_tb(DisasContext *s)
+
+{

     tcg_gen_movi_i32(cpu_R[15], s->pc & ~1);

static inline void gen_lookup_tb(DisasContext *s)

{

    tcg_gen_movi_i32(cpu_R[15], s->pc & ~1);

    s->is_jmp = DISAS_JUMP;

}


--- a/source.c
+++ b/source.c
@@ -4,7 +4,7 @@

     RTPDemuxContext *s = s1->priv_data;

+    uint32_t rtp_ts;

static void rtcp_send_sr(AVFormatContext *s1, int64_t ntp_time)

{

    RTPDemuxContext *s = s1->priv_data;

    uint32_t rtp_ts;

#if defined(DEBUG)

    printf("RTCP: %02x %"PRIx64" %x\n", s->payload_type, ntp_time, s->timestamp);

#endif

    if (s->first_rtcp_ntp_time == AV_NOPTS_VALUE) s->first_rtcp_ntp_time = ntp_time;

    s->last_rtcp_ntp_time = ntp_time;

    rtp_ts = av_rescale_q(ntp_time - s->first_rtcp_ntp_time, AV_TIME_BASE_Q,

                          s1->streams[0]->time_base) + s->base_timestamp;

    put_byte(s1->pb, (RTP_VERSION << 6));

    put_byte(s1->pb, 200);

    put_be16(s1->pb, 6); /* length in words - 1 */

    put_be32(s1->pb, s->ssrc);

    put_be32(s1->pb, ntp_time / 1000000);

    put_be32(s1->pb, ((ntp_time % 1000000) << 32) / 1000000);

    put_be32(s1->pb, rtp_ts);

    put_be32(s1->pb, s->packet_count);

    put_be32(s1->pb, s->octet_count);

    put_flush_packet(s1->pb);

}


--- a/source.c
+++ b/source.c
@@ -2,7 +2,7 @@

                                                  const char *json_string,

+                                                 va_list *ap)

 {

static Visitor *visitor_input_test_init_internal(TestInputVisitorData *data,

                                                 const char *json_string,

                                                 va_list *ap)

{

    visitor_input_teardown(data, NULL);

    data->obj = qobject_from_jsonv(json_string, ap);

    g_assert(data->obj);

    data->qiv = qobject_input_visitor_new(data->obj);

    g_assert(data->qiv);

    return data->qiv;

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
 static bool xen_host_pci_dev_is_virtfn(XenHostPCIDevice *d)

 {
+
+    char path[PATH_MAX];

     struct stat buf;

static bool xen_host_pci_dev_is_virtfn(XenHostPCIDevice *d)

{

    char path[PATH_MAX];

    struct stat buf;

    if (xen_host_pci_sysfs_path(d, "physfn", path, sizeof (path))) {

        return false;

    }

    return !stat(path, &buf);

}


static av_cold int dsp_init(AVCodecContext *avctx, AACEncContext *s)

{

    int ret = 0;

    s->fdsp = avpriv_float_dsp_alloc(avctx->flags & CODEC_FLAG_BITEXACT);

    if (!s->fdsp)

        return AVERROR(ENOMEM);

    // window init

    ff_kbd_window_init(ff_aac_kbd_long_1024, 4.0, 1024);

    ff_kbd_window_init(ff_aac_kbd_short_128, 6.0, 128);

    ff_init_ff_sine_windows(10);

    ff_init_ff_sine_windows(7);

    if (ret = ff_mdct_init(&s->mdct1024, 11, 0, 32768.0))

        return ret;

    if (ret = ff_mdct_init(&s->mdct128,   8, 0, 32768.0))

        return ret;

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -2,7 +2,7 @@

 {

+    BDRVNBDState *s = opaque;

     uint64_t i;

static void nbd_reply_ready(void *opaque)

{

    BDRVNBDState *s = opaque;

    uint64_t i;

    if (s->reply.handle == 0) {

        /* No reply already in flight.  Fetch a header.  */

        if (nbd_receive_reply(s->sock, &s->reply) < 0) {

            s->reply.handle = 0;

            goto fail;

        }

    }

    /* There's no need for a mutex on the receive side, because the

     * handler acts as a synchronization point and ensures that only

     * one coroutine is called until the reply finishes.  */

    i = HANDLE_TO_INDEX(s, s->reply.handle);

    if (i >= MAX_NBD_REQUESTS) {

        goto fail;

    }

    if (s->recv_coroutine[i]) {

        qemu_coroutine_enter(s->recv_coroutine[i], NULL);

        return;

    }

fail:

    for (i = 0; i < MAX_NBD_REQUESTS; i++) {

        if (s->recv_coroutine[i]) {

            qemu_coroutine_enter(s->recv_coroutine[i], NULL);

        }

    }

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,

+                             uint64_t address, uint32_t data, PCIDevice *dev)

+{

     S390PCIBusDevice *pbdev;

int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,

                             uint64_t address, uint32_t data, PCIDevice *dev)

{

    S390PCIBusDevice *pbdev;

    uint32_t fid = data >> ZPCI_MSI_VEC_BITS;

    uint32_t vec = data & ZPCI_MSI_VEC_MASK;

    pbdev = s390_pci_find_dev_by_fid(fid);

    if (!pbdev) {

        DPRINTF("add_msi_route no dev\n");

        return -ENODEV;

    }

    pbdev->routes.adapter.ind_offset = vec;

    route->type = KVM_IRQ_ROUTING_S390_ADAPTER;

    route->flags = 0;

    route->u.adapter.summary_addr = pbdev->routes.adapter.summary_addr;

    route->u.adapter.ind_addr = pbdev->routes.adapter.ind_addr;

    route->u.adapter.summary_offset = pbdev->routes.adapter.summary_offset;

    route->u.adapter.ind_offset = pbdev->routes.adapter.ind_offset;

    route->u.adapter.adapter_id = pbdev->routes.adapter.adapter_id;

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 CPUState *mon_get_cpu(void)

+{

     if (!cur_mon->mon_cpu) {

CPUState *mon_get_cpu(void)

{

    if (!cur_mon->mon_cpu) {

        monitor_set_cpu(0);

    }

    cpu_synchronize_state(cur_mon->mon_cpu);

    return cur_mon->mon_cpu;

}


--- a/source.c
+++ b/source.c
@@ -1,4 +1,4 @@
+static int dnxhd_init_vlc(DNXHDContext *ctx, int cid)

 {

static int dnxhd_init_vlc(DNXHDContext *ctx, int cid)

{

    if (cid != ctx->cid) {

        int index;

        if ((index = ff_dnxhd_get_cid_table(cid)) < 0) {

            av_log(ctx->avctx, AV_LOG_ERROR, "unsupported cid %d\n", cid);

            return -1;

        }

        if (ff_dnxhd_cid_table[index].bit_depth != ctx->bit_depth) {

            av_log(ctx->avctx, AV_LOG_ERROR, "bit depth mismatches %d %d\n", ff_dnxhd_cid_table[index].bit_depth, ctx->bit_depth);

            return AVERROR_INVALIDDATA;

        }

        ctx->cid_table = &ff_dnxhd_cid_table[index];

        ff_free_vlc(&ctx->ac_vlc);

        ff_free_vlc(&ctx->dc_vlc);

        ff_free_vlc(&ctx->run_vlc);

        init_vlc(&ctx->ac_vlc, DNXHD_VLC_BITS, 257,

                 ctx->cid_table->ac_bits, 1, 1,

                 ctx->cid_table->ac_codes, 2, 2, 0);

        init_vlc(&ctx->dc_vlc, DNXHD_DC_VLC_BITS, ctx->bit_depth + 4,

                 ctx->cid_table->dc_bits, 1, 1,

                 ctx->cid_table->dc_codes, 1, 1, 0);

        init_vlc(&ctx->run_vlc, DNXHD_VLC_BITS, 62,

                 ctx->cid_table->run_bits, 1, 1,

                 ctx->cid_table->run_codes, 2, 2, 0);

        ff_init_scantable(ctx->dsp.idct_permutation, &ctx->scantable, ff_zigzag_direct);

        ctx->cid = cid;

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -6,11 +6,11 @@

     CMD646BAR *cmd646bar = opaque;

+
+
+    if (size == 1) {
+
+        ide_ioport_write(cmd646bar->bus, addr, data);

     } else if (addr == 0) {

static void cmd646_data_write(void *opaque, target_phys_addr_t addr,

                             uint64_t data, unsigned size)

{

    CMD646BAR *cmd646bar = opaque;

    if (size == 1) {

        ide_ioport_write(cmd646bar->bus, addr, data);

    } else if (addr == 0) {

        if (size == 2) {

            ide_data_writew(cmd646bar->bus, addr, data);

        } else {

            ide_data_writel(cmd646bar->bus, addr, data);

        }

    }

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
+static VirtIOSerialBus *virtser_bus_new(DeviceState *dev)
+
+{
+
+    VirtIOSerialBus *bus;

static VirtIOSerialBus *virtser_bus_new(DeviceState *dev)

{

    VirtIOSerialBus *bus;

    bus = FROM_QBUS(VirtIOSerialBus, qbus_create(&virtser_bus_info, dev, NULL));

    bus->qbus.allow_hotplug = 1;

    return bus;

}


--- a/source.c
+++ b/source.c
@@ -7,11 +7,11 @@

     QTAILQ_FOREACH(rom, &roms, next) {
+
+        if (rom->fw_file) {
+
+            continue;
+
         }

         if (rom->addr > addr) {

static Rom *find_rom(target_phys_addr_t addr)

{

    Rom *rom;

    QTAILQ_FOREACH(rom, &roms, next) {

        if (rom->fw_file) {

            continue;

        }

        if (rom->addr > addr) {

            continue;

        }

        if (rom->addr + rom->romsize < addr) {

            continue;

        }

        return rom;

    }

    return NULL;

}


--- a/source.c
+++ b/source.c
@@ -48,11 +48,11 @@
         /* copy using 8xH blocks */

         if (!((cell->xpos << 2) & 7) && w >= 2) {
+
+            ctx->dsp.put_no_rnd_pixels_tab[1][0](dst, src, plane->pitch, h);
+
+            w -= 2;
+
             src += 8;

             dst += 8;

static void copy_cell(Indeo3DecodeContext *ctx, Plane *plane, Cell *cell)

{

    int     h, w, mv_x, mv_y, offset, offset_dst;

    uint8_t *src, *dst;

    /* setup output and reference pointers */

    offset_dst  = (cell->ypos << 2) * plane->pitch + (cell->xpos << 2);

    dst         = plane->pixels[ctx->buf_sel] + offset_dst;

    mv_y        = cell->mv_ptr[0];

    mv_x        = cell->mv_ptr[1];

    offset      = offset_dst + mv_y * plane->pitch + mv_x;

    src         = plane->pixels[ctx->buf_sel ^ 1] + offset;

    h = cell->height << 2;

    for (w = cell->width; w > 0;) {

        /* copy using 16xH blocks */

        if (!((cell->xpos << 2) & 15) && w >= 4) {

            for (; w >= 4; src += 16, dst += 16, w -= 4)

                ctx->dsp.put_no_rnd_pixels_tab[0][0](dst, src, plane->pitch, h);

        }

        /* copy using 8xH blocks */

        if (!((cell->xpos << 2) & 7) && w >= 2) {

            ctx->dsp.put_no_rnd_pixels_tab[1][0](dst, src, plane->pitch, h);

            w -= 2;

            src += 8;

            dst += 8;

        }

        if (w >= 1) {

            copy_block4(dst, src, plane->pitch, plane->pitch, h);

            w--;

            src += 4;

            dst += 4;

        }

    }

}


--- a/source.c
+++ b/source.c
@@ -47,11 +47,11 @@
 				 prot);

     } else if (extended_addresses_enabled(env)) {
+
+        return get_phys_addr_lpae(env, address, access_type, is_user, phys_ptr,
+
+                                  prot, page_size);
+
     } else if (sctlr & SCTLR_XP) {

         return get_phys_addr_v6(env, address, access_type, is_user, phys_ptr,

static inline int get_phys_addr(CPUARMState *env, target_ulong address,

                                int access_type, int is_user,

                                hwaddr *phys_ptr, int *prot,

                                target_ulong *page_size)

{

    /* This is not entirely correct as get_phys_addr() can also be called

     * from ats_write() for an address translation of a specific regime.

     */

    uint32_t sctlr = A32_BANKED_CURRENT_REG_GET(env, sctlr);

    /* Fast Context Switch Extension.  */

    if (address < 0x02000000)

        address += env->cp15.c13_fcse;

    if ((sctlr & SCTLR_M) == 0) {

        /* MMU/MPU disabled.  */

        *phys_ptr = address;

        *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;

        *page_size = TARGET_PAGE_SIZE;

        return 0;

    } else if (arm_feature(env, ARM_FEATURE_MPU)) {

        *page_size = TARGET_PAGE_SIZE;

	return get_phys_addr_mpu(env, address, access_type, is_user, phys_ptr,

				 prot);

    } else if (extended_addresses_enabled(env)) {

        return get_phys_addr_lpae(env, address, access_type, is_user, phys_ptr,

                                  prot, page_size);

    } else if (sctlr & SCTLR_XP) {

        return get_phys_addr_v6(env, address, access_type, is_user, phys_ptr,

                                prot, page_size);

    } else {

        return get_phys_addr_v5(env, address, access_type, is_user, phys_ptr,

                                prot, page_size);

    }

}


--- a/source.c
+++ b/source.c
@@ -3,7 +3,7 @@
 {

     CPUState *cs = CPU(obj);
+
     SPARCCPU *cpu = SPARC_CPU(obj);

     CPUSPARCState *env = &cpu->env;

static void sparc_cpu_initfn(Object *obj)

{

    CPUState *cs = CPU(obj);

    SPARCCPU *cpu = SPARC_CPU(obj);

    CPUSPARCState *env = &cpu->env;

    cs->env_ptr = env;

    cpu_exec_init(cs, &error_abort);

    if (tcg_enabled()) {

        gen_intermediate_code_init(env);

    }

}


--- a/source.c
+++ b/source.c
@@ -8,7 +8,7 @@

     int i, count, name_len, ret;

+    char name[1024];

static int asf_read_marker(AVFormatContext *s, int64_t size)

{

    AVIOContext *pb = s->pb;

    ASFContext *asf = s->priv_data;

    int i, count, name_len, ret;

    char name[1024];

    avio_rl64(pb);            // reserved 16 bytes

    avio_rl64(pb);            // ...

    count = avio_rl32(pb);    // markers count

    avio_rl16(pb);            // reserved 2 bytes

    name_len = avio_rl16(pb); // name length

    for (i = 0; i < name_len; i++)

        avio_r8(pb); // skip the name

    for (i = 0; i < count; i++) {

        int64_t pres_time;

        int name_len;

        avio_rl64(pb);             // offset, 8 bytes

        pres_time = avio_rl64(pb); // presentation time

        pres_time -= asf->hdr.preroll * 10000;

        avio_rl16(pb);             // entry length

        avio_rl32(pb);             // send time

        avio_rl32(pb);             // flags

        name_len = avio_rl32(pb);  // name length

        if ((ret = avio_get_str16le(pb, name_len * 2, name,

                                    sizeof(name))) < name_len)

            avio_skip(pb, name_len - ret);

        avpriv_new_chapter(s, i, (AVRational) { 1, 10000000 }, pres_time,

                           AV_NOPTS_VALUE, name);

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -34,11 +34,11 @@

     fail_unless(count == qdict_size(tests_dict));

+
+
+    /* Do it again to test restarting */
+
+    count = 0;

     for (ent = qdict_first(tests_dict); ent; ent = qdict_next(tests_dict, ent)){

START_TEST(qdict_iterapi_test)

{

    int count;

    const QDictEntry *ent;

    fail_unless(qdict_first(tests_dict) == NULL);

    qdict_put(tests_dict, "key1", qint_from_int(1));

    qdict_put(tests_dict, "key2", qint_from_int(2));

    qdict_put(tests_dict, "key3", qint_from_int(3));

    count = 0;

    for (ent = qdict_first(tests_dict); ent; ent = qdict_next(tests_dict, ent)){

        fail_unless(qdict_haskey(tests_dict, qdict_entry_key(ent)) == 1);

        count++;

    }

    fail_unless(count == qdict_size(tests_dict));

    /* Do it again to test restarting */

    count = 0;

    for (ent = qdict_first(tests_dict); ent; ent = qdict_next(tests_dict, ent)){

        fail_unless(qdict_haskey(tests_dict, qdict_entry_key(ent)) == 1);

        count++;

    }

    fail_unless(count == qdict_size(tests_dict));

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 static int parse_dsd_diin(AVFormatContext *s, AVStream *st, uint64_t eof)

+{

     AVIOContext *pb = s->pb;

static int parse_dsd_diin(AVFormatContext *s, AVStream *st, uint64_t eof)

{

    AVIOContext *pb = s->pb;

    while (avio_tell(pb) + 12 <= eof) {

        uint32_t tag      = avio_rl32(pb);

        uint64_t size     = avio_rb64(pb);

        uint64_t orig_pos = avio_tell(pb);

        const char * metadata_tag = NULL;

        switch(tag) {

        case MKTAG('D','I','A','R'): metadata_tag = "artist"; break;

        case MKTAG('D','I','T','I'): metadata_tag = "title";  break;

        }

        if (metadata_tag && size > 4) {

            unsigned int tag_size = avio_rb32(pb);

            int ret = get_metadata(s, metadata_tag, FFMIN(tag_size, size - 4));

            if (ret < 0) {

                av_log(s, AV_LOG_ERROR, "cannot allocate metadata tag %s!\n", metadata_tag);

                return ret;

            }

        }

        avio_skip(pb, size - (avio_tell(pb) - orig_pos) + (size & 1));

    }

    return 0;

}


void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)

{

    int i;

    X86CPU *cpu = NULL;

    Error *error = NULL;

    unsigned long apic_id_limit;

    /* init CPUs */

    if (cpu_model == NULL) {

#ifdef TARGET_X86_64

        cpu_model = "qemu64";

#else

        cpu_model = "qemu32";

#endif

    }

    current_cpu_model = cpu_model;

    apic_id_limit = pc_apic_id_limit(max_cpus);

    if (apic_id_limit > ACPI_CPU_HOTPLUG_ID_LIMIT) {

        error_report("max_cpus is too large. APIC ID of last CPU is %lu",

                     apic_id_limit - 1);

        exit(1);

    }

    for (i = 0; i < smp_cpus; i++) {

        cpu = pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i),

                         icc_bridge, &error);

        if (error) {

            error_report_err(error);

            exit(1);

        }

        object_unref(OBJECT(cpu));

    }

    /* tell smbios about cpuid version and features */

    smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);

}


--- a/source.c
+++ b/source.c
@@ -1,5 +1,5 @@
+void qemu_aio_ref(void *p)
+
 {

     BlockAIOCB *acb = p;

void qemu_aio_ref(void *p)

{

    BlockAIOCB *acb = p;

    acb->refcnt++;

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 void OPPROTO op_addq_ESI_T0(void)

 {
+
     ESI = (ESI + T0);

 }

void OPPROTO op_addq_ESI_T0(void)

{

    ESI = (ESI + T0);

}


--- a/source.c
+++ b/source.c
@@ -35,11 +35,11 @@
     c->func = func;

     if (ret) {
+
+        c->rets = ret;
+
+        c->rets_count = job_count;
+
     } else {

         c->rets = &dummy_ret;

static int thread_execute(AVCodecContext *avctx, action_func* func, void *arg, int *ret, int job_count, int job_size)

{

    SliceThreadContext *c = avctx->internal->thread_ctx;

    int dummy_ret;

    if (!(avctx->active_thread_type&FF_THREAD_SLICE) || avctx->thread_count <= 1)

        return avcodec_default_execute(avctx, func, arg, ret, job_count, job_size);

    if (job_count <= 0)

        return 0;

    pthread_mutex_lock(&c->current_job_lock);

    c->current_job = avctx->thread_count;

    c->job_count = job_count;

    c->job_size = job_size;

    c->args = arg;

    c->func = func;

    if (ret) {

        c->rets = ret;

        c->rets_count = job_count;

    } else {

        c->rets = &dummy_ret;

        c->rets_count = 1;

    }

    c->current_execute++;

    pthread_cond_broadcast(&c->current_job_cond);

    thread_park_workers(c, avctx->thread_count);

    return 0;

}