--- a/source.c
+++ b/source.c
@@ -1,15 +1,15 @@
+static int net_vhost_chardev_opts(void *opaque,
+
+                                  const char *name, const char *value,
+
+                                  Error **errp)
+
+{

+    VhostUserChardevProps *props = opaque;
+

+
     if (strcmp(name, "backend") == 0 && strcmp(value, "socket") == 0) {

         props->is_socket = true;

static int net_vhost_chardev_opts(void *opaque,

                                  const char *name, const char *value,

                                  Error **errp)

{

    VhostUserChardevProps *props = opaque;

    if (strcmp(name, "backend") == 0 && strcmp(value, "socket") == 0) {

        props->is_socket = true;

    } else if (strcmp(name, "path") == 0) {

        props->is_unix = true;

    } else if (strcmp(name, "server") == 0) {

    } else {

        error_setg(errp,

                   "vhost-user does not support a chardev with option %s=%s",

                   name, value);

        return -1;

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,4 +1,4 @@
+static void div64(uint64_t *plow, uint64_t *phigh, uint64_t b)

 {

static void div64(uint64_t *plow, uint64_t *phigh, uint64_t b)

{

    uint64_t q, r, a1, a0;

    int i, qb;

    a0 = *plow;

    a1 = *phigh;

    if (a1 == 0) {

        q = a0 / b;

        r = a0 % b;

        *plow = q;

        *phigh = r;

    } else {

        /* XXX: use a better algorithm */

        for(i = 0; i < 64; i++) {

            a1 = (a1 << 1) | (a0 >> 63);

            if (a1 >= b) {

                a1 -= b;

                qb = 1;

            } else {

                qb = 0;

            }

            a0 = (a0 << 1) | qb;

        }

#if defined(DEBUG_MULDIV)

        printf("div: 0x%016llx%016llx / 0x%016llx: q=0x%016llx r=0x%016llx\n",

               *phigh, *plow, b, a0, a1);

#endif

        *plow = a0;

        *phigh = a1;

    }

}


--- a/source.c
+++ b/source.c
@@ -3,10 +3,10 @@
 {

     HDACodecDevice *dev = HDA_CODEC_DEVICE(qdev);
+
+    HDACodecDeviceClass *cdc = HDA_CODEC_DEVICE_GET_CLASS(dev);
+
+

     if (cdc->exit) {

static int hda_codec_dev_exit(DeviceState *qdev)

{

    HDACodecDevice *dev = HDA_CODEC_DEVICE(qdev);

    HDACodecDeviceClass *cdc = HDA_CODEC_DEVICE_GET_CLASS(dev);

    if (cdc->exit) {

        cdc->exit(dev);

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,15 +1,15 @@
 static int bt_hci_name_req(struct bt_hci_s *hci, bdaddr_t *bdaddr)

 {
+
     struct bt_device_s *slave;

     evt_remote_name_req_complete params;

     int len;

+
+
     for (slave = hci->device.net->slave; slave; slave = slave->next)

         if (slave->page_scan && !bacmp(&slave->bd_addr, bdaddr))

static int bt_hci_name_req(struct bt_hci_s *hci, bdaddr_t *bdaddr)

{

    struct bt_device_s *slave;

    evt_remote_name_req_complete params;

    int len;

    for (slave = hci->device.net->slave; slave; slave = slave->next)

        if (slave->page_scan && !bacmp(&slave->bd_addr, bdaddr))

            break;

    if (!slave)

        return -ENODEV;

    bt_hci_event_status(hci, HCI_SUCCESS);

    params.status       = HCI_SUCCESS;

    bacpy(&params.bdaddr, &slave->bd_addr);

    len = snprintf(params.name, sizeof(params.name),

                    "%s", slave->lmp_name ?: "");

    memset(params.name + len, 0, sizeof(params.name) - len);

    bt_hci_event(hci, EVT_REMOTE_NAME_REQ_COMPLETE,

                    &params, EVT_REMOTE_NAME_REQ_COMPLETE_SIZE);

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 static void disable_device(PIIX4PMState *s, int slot)

+{

     s->ar.gpe.sts[0] |= PIIX4_PCI_HOTPLUG_STATUS;

static void disable_device(PIIX4PMState *s, int slot)

{

    s->ar.gpe.sts[0] |= PIIX4_PCI_HOTPLUG_STATUS;

    s->pci0_status.down |= (1 << slot);

}


--- a/source.c
+++ b/source.c
@@ -13,7 +13,7 @@
     pci_config_set_device_id(d->card.config, PCI_DEVICE_ID_INTEL_82801IR);

+
     pci_config_set_class(d->card.config, PCI_CLASS_STORAGE_SATA);

     pci_config_set_revision(d->card.config, 0x02);

static int pci_ich9_ahci_init(PCIDevice *dev)

{

    struct AHCIPCIState *d;

    d = DO_UPCAST(struct AHCIPCIState, card, dev);

    pci_config_set_vendor_id(d->card.config, PCI_VENDOR_ID_INTEL);

    pci_config_set_device_id(d->card.config, PCI_DEVICE_ID_INTEL_82801IR);

    pci_config_set_class(d->card.config, PCI_CLASS_STORAGE_SATA);

    pci_config_set_revision(d->card.config, 0x02);

    pci_config_set_prog_interface(d->card.config, AHCI_PROGMODE_MAJOR_REV_1);

    d->card.config[PCI_CACHE_LINE_SIZE] = 0x08;  /* Cache line size */

    d->card.config[PCI_LATENCY_TIMER]   = 0x00;  /* Latency timer */

    pci_config_set_interrupt_pin(d->card.config, 1);

    /* XXX Software should program this register */

    d->card.config[0x90]   = 1 << 6; /* Address Map Register - AHCI mode */

    qemu_register_reset(ahci_reset, d);

    /* XXX BAR size should be 1k, but that breaks, so bump it to 4k for now */

    pci_register_bar_simple(&d->card, 5, 0x1000, 0, d->ahci.mem);

    msi_init(dev, 0x50, 1, true, false);

    ahci_init(&d->ahci, &dev->qdev, 6);

    d->ahci.irq = d->card.irq[0];

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -11,11 +11,11 @@

     VIRTIO_GPU_FILL_CMD(info);
+
+
+
+
+    if (info.capset_index == 0) {

         resp.capset_id = VIRTIO_GPU_CAPSET_VIRGL;

static void virgl_cmd_get_capset_info(VirtIOGPU *g,

                                      struct virtio_gpu_ctrl_command *cmd)

{

    struct virtio_gpu_get_capset_info info;

    struct virtio_gpu_resp_capset_info resp;

    VIRTIO_GPU_FILL_CMD(info);

    if (info.capset_index == 0) {

        resp.capset_id = VIRTIO_GPU_CAPSET_VIRGL;

        virgl_renderer_get_cap_set(resp.capset_id,

                                   &resp.capset_max_version,

                                   &resp.capset_max_size);

    } else {

        resp.capset_max_version = 0;

        resp.capset_max_size = 0;

    }

    resp.hdr.type = VIRTIO_GPU_RESP_OK_CAPSET_INFO;

    virtio_gpu_ctrl_response(g, cmd, &resp.hdr, sizeof(resp));

}


--- a/source.c
+++ b/source.c
@@ -4,7 +4,7 @@

     CPUState *cs = CPU(obj);

+    LM32CPU *cpu = LM32_CPU(obj);

     CPULM32State *env = &cpu->env;

static void lm32_cpu_initfn(Object *obj)

{

    CPUState *cs = CPU(obj);

    LM32CPU *cpu = LM32_CPU(obj);

    CPULM32State *env = &cpu->env;

    static bool tcg_initialized;

    cs->env_ptr = env;

    cpu_exec_init(cs, &error_abort);

    env->flags = 0;

    if (tcg_enabled() && !tcg_initialized) {

        tcg_initialized = true;

        lm32_translate_init();

    }

}


--- a/source.c
+++ b/source.c
@@ -1,13 +1,13 @@
+static void adb_kbd_class_init(ObjectClass *oc, void *data)
+
+{
+
+    DeviceClass *dc = DEVICE_CLASS(oc);
+
+    ADBDeviceClass *adc = ADB_DEVICE_CLASS(oc);
+
+    ADBKeyboardClass *akc = ADB_KEYBOARD_CLASS(oc);
+

     akc->parent_realize = dc->realize;

static void adb_kbd_class_init(ObjectClass *oc, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(oc);

    ADBDeviceClass *adc = ADB_DEVICE_CLASS(oc);

    ADBKeyboardClass *akc = ADB_KEYBOARD_CLASS(oc);

    akc->parent_realize = dc->realize;

    dc->realize = adb_kbd_realizefn;

    set_bit(DEVICE_CATEGORY_INPUT, dc->categories);

    adc->devreq = adb_kbd_request;

    dc->reset = adb_kbd_reset;

    dc->vmsd = &vmstate_adb_kbd;

}


--- a/source.c
+++ b/source.c
@@ -5,10 +5,10 @@
                                         IOHandler *fd_read,

                                         IOHandler *fd_write,
+
+                                        void *opaque)
+
+

 {

static int default_qemu_set_fd_handler2(int fd,

                                        IOCanReadHandler *fd_read_poll,

                                        IOHandler *fd_read,

                                        IOHandler *fd_write,

                                        void *opaque)

{

    abort();

}


static void init_timetables( FM_OPL *OPL , int ARRATE , int DRRATE )

{

	int i;

	double rate;

	/* make attack rate & decay rate tables */

	for (i = 0;i < 4;i++) OPL->AR_TABLE[i] = OPL->DR_TABLE[i] = 0;

	for (i = 4;i <= 60;i++){

		rate  = OPL->freqbase;						/* frequency rate */

		if( i < 60 ) rate *= 1.0+(i&3)*0.25;		/* b0-1 : x1 , x1.25 , x1.5 , x1.75 */

		rate *= 1<<((i>>2)-1);						/* b2-5 : shift bit */

		rate *= (double)(EG_ENT<<ENV_BITS);

		OPL->AR_TABLE[i] = rate / ARRATE;

		OPL->DR_TABLE[i] = rate / DRRATE;

	}

	for (i = 60; i < ARRAY_SIZE(OPL->AR_TABLE); i++)

	{

		OPL->AR_TABLE[i] = EG_AED-1;

		OPL->DR_TABLE[i] = OPL->DR_TABLE[60];

	}

#if 0

	for (i = 0;i < 64 ;i++){	/* make for overflow area */

		LOG(LOG_WAR,("rate %2d , ar %f ms , dr %f ms \n",i,

			((double)(EG_ENT<<ENV_BITS) / OPL->AR_TABLE[i]) * (1000.0 / OPL->rate),

			((double)(EG_ENT<<ENV_BITS) / OPL->DR_TABLE[i]) * (1000.0 / OPL->rate) ));

	}

#endif

}


--- a/source.c
+++ b/source.c
@@ -11,11 +11,11 @@
     qemu_check_nic_model(nd, "mcf_fec");

+
+    s = (mcf_fec_state *)g_malloc0(sizeof(mcf_fec_state));
+
+    s->sysmem = sysmem;
+
     s->irq = irq;

void mcf_fec_init(MemoryRegion *sysmem, NICInfo *nd,

                  target_phys_addr_t base, qemu_irq *irq)

{

    mcf_fec_state *s;

    qemu_check_nic_model(nd, "mcf_fec");

    s = (mcf_fec_state *)g_malloc0(sizeof(mcf_fec_state));

    s->sysmem = sysmem;

    s->irq = irq;

    memory_region_init_io(&s->iomem, &mcf_fec_ops, s, "fec", 0x400);

    memory_region_add_subregion(sysmem, base, &s->iomem);

    s->conf.macaddr = nd->macaddr;

    s->conf.peer = nd->netdev;

    s->nic = qemu_new_nic(&net_mcf_fec_info, &s->conf, nd->model, nd->name, s);

    qemu_format_nic_info_str(&s->nic->nc, s->conf.macaddr.a);

}


static void vc1_h_overlap_c(uint8_t* src, int stride)

{

    int i;

    int a, b, c, d;

    int d1, d2;

    int rnd = 1;

    for(i = 0; i < 8; i++) {

        a = src[-2];

        b = src[-1];

        c = src[0];

        d = src[1];

        d1 = (a - d + 3 + rnd) >> 3;

        d2 = (a - d + b - c + 4 - rnd) >> 3;

        src[-2] = a - d1;

        src[-1] = b - d2;

        src[0] = c + d2;

        src[1] = d + d1;

        src += stride;

        rnd = !rnd;

    }

}


--- a/source.c
+++ b/source.c
@@ -19,7 +19,7 @@
         int w = inlink->w;

         int h = inlink->h;
+
         int r = gf->radius;

         if (p) {

static void end_frame(AVFilterLink *inlink)

{

    GradFunContext *gf = inlink->dst->priv;

    AVFilterBufferRef *inpic = inlink->cur_buf;

    AVFilterLink *outlink = inlink->dst->outputs[0];

    AVFilterBufferRef *outpic = outlink->out_buf;

    int p;

    for (p = 0; p < 4 && inpic->data[p]; p++) {

        int w = inlink->w;

        int h = inlink->h;

        int r = gf->radius;

        if (p) {

            w = gf->chroma_w;

            h = gf->chroma_h;

            r = gf->chroma_r;

        }

        if (FFMIN(w, h) > 2 * r)

            filter(gf, outpic->data[p], inpic->data[p], w, h, outpic->linesize[p], inpic->linesize[p], r);

        else if (outpic->data[p] != inpic->data[p])

            av_image_copy_plane(outpic->data[p], outpic->linesize[p], inpic->data[p], inpic->linesize[p], w, h);

    }

    avfilter_draw_slice(outlink, 0, inlink->h, 1);

    avfilter_end_frame(outlink);

    avfilter_unref_buffer(inpic);

    avfilter_unref_buffer(outpic);

}


--- a/source.c
+++ b/source.c
@@ -2,7 +2,7 @@

                       int abort_on_failure)

+{

     QemuOpts *opts;

int qemu_opts_foreach(QemuOptsList *list, qemu_opts_loopfunc func, void *opaque,

                      int abort_on_failure)

{

    QemuOpts *opts;

    int rc = 0;

    QTAILQ_FOREACH(opts, &list->head, next) {

        rc = func(opts, opaque);

        if (abort_on_failure  &&  rc != 0)

            break;

    }

    return rc;

}


--- a/source.c
+++ b/source.c
@@ -17,11 +17,11 @@
         f->iov[f->iovcnt++].iov_len = size;

     }
+
+
+
+    if (f->buf_index >= IO_BUF_SIZE || f->iovcnt >= MAX_IOV_SIZE) {
+
         qemu_fflush(f);

     }

static void add_to_iovec(QEMUFile *f, const uint8_t *buf, int size)

{

    /* check for adjacent buffer and coalesce them */

    if (f->iovcnt > 0 && buf == f->iov[f->iovcnt - 1].iov_base +

        f->iov[f->iovcnt - 1].iov_len) {

        f->iov[f->iovcnt - 1].iov_len += size;

    } else {

        f->iov[f->iovcnt].iov_base = (uint8_t *)buf;

        f->iov[f->iovcnt++].iov_len = size;

    }

    if (f->buf_index >= IO_BUF_SIZE || f->iovcnt >= MAX_IOV_SIZE) {

        qemu_fflush(f);

    }

}


--- a/source.c
+++ b/source.c
@@ -18,8 +18,8 @@

     g_free(shpc->wmask);

+    g_free(shpc->w1cmask);
+
+    g_free(shpc);
+
+}

void shpc_cleanup(PCIDevice *d, MemoryRegion *bar)

{

    SHPCDevice *shpc = d->shpc;

    d->cap_present &= ~QEMU_PCI_CAP_SHPC;

    memory_region_del_subregion(bar, &shpc->mmio);

    object_unparent(OBJECT(&shpc->mmio));

    /* TODO: cleanup config space changes? */

    g_free(shpc->config);

    g_free(shpc->cmask);

    g_free(shpc->wmask);

    g_free(shpc->w1cmask);

    g_free(shpc);

}


--- a/source.c
+++ b/source.c
@@ -3,11 +3,11 @@
 {

     clear_blocks = clear_blocks_mmi;
+
+
+
+    put_pixels_tab[1][0] = put_pixels8_mmi;
+
     put_no_rnd_pixels_tab[1][0] = put_pixels8_mmi;

void dsputil_init_mmi(void)

{

    clear_blocks = clear_blocks_mmi;

    put_pixels_tab[1][0] = put_pixels8_mmi;

    put_no_rnd_pixels_tab[1][0] = put_pixels8_mmi;

    put_pixels_tab[0][0] = put_pixels16_mmi;

    put_no_rnd_pixels_tab[0][0] = put_pixels16_mmi;

    get_pixels = get_pixels_mmi;

}


--- a/source.c
+++ b/source.c
@@ -4,11 +4,11 @@

 {

+    const char *name = qemu_opt_get(opts, "name");
+
+
+
+    if (name == NULL) {

         error_setg(errp, "chardev: spice channel: no name given");

static void qemu_chr_parse_spice_vmc(QemuOpts *opts, ChardevBackend *backend,

                                     Error **errp)

{

    const char *name = qemu_opt_get(opts, "name");

    if (name == NULL) {

        error_setg(errp, "chardev: spice channel: no name given");

        return;

    }

    backend->u.spicevmc = g_new0(ChardevSpiceChannel, 1);

    backend->u.spicevmc->type = g_strdup(name);

}


--- a/source.c
+++ b/source.c
@@ -1,11 +1,11 @@
 static void sdhci_class_init(ObjectClass *klass, void *data)

 {
+
+    DeviceClass *dc = DEVICE_CLASS(klass);
+
+    SDHCIClass *k = SDHCI_CLASS(klass);
+

     dc->vmsd = &sdhci_vmstate;

static void sdhci_class_init(ObjectClass *klass, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(klass);

    SDHCIClass *k = SDHCI_CLASS(klass);

    dc->vmsd = &sdhci_vmstate;

    dc->props = sdhci_properties;

    dc->reset = sdhci_generic_reset;

    dc->realize = sdhci_realize;

    k->reset = sdhci_reset;

    k->mem_read = sdhci_read;

    k->mem_write = sdhci_write;

    k->send_command = sdhci_send_command;

    k->can_issue_command = sdhci_can_issue_command;

    k->data_transfer = sdhci_data_transfer;

    k->end_data_transfer = sdhci_end_transfer;

    k->do_sdma_single = sdhci_sdma_transfer_single_block;

    k->do_sdma_multi = sdhci_sdma_transfer_multi_blocks;

    k->do_adma = sdhci_do_adma;

    k->read_block_from_card = sdhci_read_block_from_card;

    k->write_block_to_card = sdhci_write_block_to_card;

    k->bdata_read = sdhci_read_dataport;

    k->bdata_write = sdhci_write_dataport;

}


--- a/source.c
+++ b/source.c
@@ -63,11 +63,11 @@
     case 1:

         s->dmaregs[0] |= DMA_LOADED;
+
+        break;
+
+    default:
+
         break;

     }

static void dma_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)

{

    DMAState *s = opaque;

    uint32_t saddr;

    saddr = (addr & DMA_MASK) >> 2;

    DPRINTF("write dmareg " TARGET_FMT_plx ": 0x%8.8x -> 0x%8.8x\n", addr,

            s->dmaregs[saddr], val);

    switch (saddr) {

    case 0:

        if (val & DMA_INTREN) {

            if (val & DMA_INTR) {

                DPRINTF("Raise IRQ\n");

                qemu_irq_raise(s->irq);

            }

        } else {

            if (s->dmaregs[0] & (DMA_INTR | DMA_INTREN)) {

                DPRINTF("Lower IRQ\n");

                qemu_irq_lower(s->irq);

            }

        }

        if (val & DMA_RESET) {

            qemu_irq_raise(s->dev_reset);

            qemu_irq_lower(s->dev_reset);

        } else if (val & DMA_DRAIN_FIFO) {

            val &= ~DMA_DRAIN_FIFO;

        } else if (val == 0)

            val = DMA_DRAIN_FIFO;

        val &= 0x0fffffff;

        val |= DMA_VER;

        break;

    case 1:

        s->dmaregs[0] |= DMA_LOADED;

        break;

    default:

        break;

    }

    s->dmaregs[saddr] = val;

}


--- a/source.c
+++ b/source.c
@@ -2,7 +2,7 @@

                              int nb_sectors, int *pnum)

+{

     BDRVVmdkState *s = bs->opaque;

static int vmdk_is_allocated(BlockDriverState *bs, int64_t sector_num,

                             int nb_sectors, int *pnum)

{

    BDRVVmdkState *s = bs->opaque;

    int index_in_cluster, n;

    uint64_t cluster_offset;

    cluster_offset = get_cluster_offset(bs, sector_num << 9, 0);

    index_in_cluster = sector_num % s->cluster_sectors;

    n = s->cluster_sectors - index_in_cluster;

    if (n > nb_sectors)

        n = nb_sectors;

    *pnum = n;

    return (cluster_offset != 0);

}


--- a/source.c
+++ b/source.c
@@ -1,17 +1,17 @@
 static void update_irq(struct HPETTimer *timer)
+
 {

+    qemu_irq irq;
+
     int route;
+

+
+    if (timer->tn <= 1 && hpet_in_legacy_mode()) {

+        /* if LegacyReplacementRoute bit is set, HPET specification requires
+
          * timer0 be routed to IRQ0 in NON-APIC or IRQ2 in the I/O APIC,

          * timer1 be routed to IRQ8 in NON-APIC or IRQ8 in the I/O APIC.

static void update_irq(struct HPETTimer *timer)

{

    qemu_irq irq;

    int route;

    if (timer->tn <= 1 && hpet_in_legacy_mode()) {

        /* if LegacyReplacementRoute bit is set, HPET specification requires

         * timer0 be routed to IRQ0 in NON-APIC or IRQ2 in the I/O APIC,

         * timer1 be routed to IRQ8 in NON-APIC or IRQ8 in the I/O APIC.

         */

        if (timer->tn == 0) {

            irq=timer->state->irqs[0];

        } else

            irq=timer->state->irqs[8];

    } else {

        route=timer_int_route(timer);

        irq=timer->state->irqs[route];

    }

    if (timer_enabled(timer) && hpet_enabled()) {

        qemu_irq_pulse(irq);

    }

}


--- a/source.c
+++ b/source.c
@@ -47,11 +47,11 @@

         closesocket(server_fd);

+        return -1;
+
+    }
+
+    ff_socket_nonblock(server_fd, 1);

static int socket_open_listen(struct sockaddr_in *my_addr)

{

    int server_fd, tmp;

    server_fd = socket(AF_INET,SOCK_STREAM,0);

    if (server_fd < 0) {

        perror ("socket");

        return -1;

    }

    tmp = 1;

    setsockopt(server_fd, SOL_SOCKET, SO_REUSEADDR, &tmp, sizeof(tmp));

    if (bind (server_fd, (struct sockaddr *) my_addr, sizeof (*my_addr)) < 0) {

        char bindmsg[32];

        snprintf(bindmsg, sizeof(bindmsg), "bind(port %d)", ntohs(my_addr->sin_port));

        perror (bindmsg);

        closesocket(server_fd);

        return -1;

    }

    if (listen (server_fd, 5) < 0) {

        perror ("listen");

        closesocket(server_fd);

        return -1;

    }

    ff_socket_nonblock(server_fd, 1);

    return server_fd;

}


--- a/source.c
+++ b/source.c
@@ -8,7 +8,7 @@

     NBDReply reply;

+    ssize_t ret;

int nbd_client_co_flush(BlockDriverState *bs)

{

    NBDClientSession *client = nbd_get_client_session(bs);

    NBDRequest request = { .type = NBD_CMD_FLUSH };

    NBDReply reply;

    ssize_t ret;

    if (!(client->nbdflags & NBD_FLAG_SEND_FLUSH)) {

        return 0;

    }

    request.from = 0;

    request.len = 0;

    nbd_coroutine_start(client, &request);

    ret = nbd_co_send_request(bs, &request, NULL);

    if (ret < 0) {

        reply.error = -ret;

    } else {

        nbd_co_receive_reply(client, &request, &reply, NULL);

    }

    nbd_coroutine_end(bs, &request);

    return -reply.error;

}


--- a/source.c
+++ b/source.c
@@ -5,10 +5,10 @@
     ff_add_pixels_clamped = c->add_pixels_clamped;
     if(idct_algo==FF_IDCT_ARM){
     if(idct_algo==FF_IDCT_AUTO || idct_algo==FF_IDCT_ARM){
+        c->idct_put= j_rev_dct_ARM_put;
+        c->idct_add= j_rev_dct_ARM_add;
+	c->idct    = j_rev_dct_ARM;
+        c->idct_permutation_type= FF_LIBMPEG2_IDCT_PERM;/* FF_NO_IDCT_PERM */
     } else if (idct_algo==FF_IDCT_SIMPLEARM){
 	c->idct_put= simple_idct_ARM_put;
 	c->idct_add= simple_idct_ARM_add;

void dsputil_init_armv4l(DSPContext* c, AVCodecContext *avctx)
{
    const int idct_algo= avctx->idct_algo;
    ff_put_pixels_clamped = c->put_pixels_clamped;
    ff_add_pixels_clamped = c->add_pixels_clamped;
    if(idct_algo==FF_IDCT_ARM){
    if(idct_algo==FF_IDCT_AUTO || idct_algo==FF_IDCT_ARM){
        c->idct_put= j_rev_dct_ARM_put;
        c->idct_add= j_rev_dct_ARM_add;
	c->idct    = j_rev_dct_ARM;
        c->idct_permutation_type= FF_LIBMPEG2_IDCT_PERM;/* FF_NO_IDCT_PERM */
    } else if (idct_algo==FF_IDCT_SIMPLEARM){
	c->idct_put= simple_idct_ARM_put;
	c->idct_add= simple_idct_ARM_add;
	c->idct    = simple_idct_ARM;
    }
}


--- a/source.c
+++ b/source.c
@@ -1,4 +1,4 @@
+static void openpic_irq_raise(OpenPICState *opp, int n_CPU, IRQ_src_t *src)

 {

static void openpic_irq_raise(OpenPICState *opp, int n_CPU, IRQ_src_t *src)

{

    int n_ci = IDR_CI0_SHIFT - n_CPU;

    if ((opp->flags & OPENPIC_FLAG_IDE_CRIT) && (src->ide & (1 << n_ci))) {

        qemu_irq_raise(opp->dst[n_CPU].irqs[OPENPIC_OUTPUT_CINT]);

    } else {

        qemu_irq_raise(opp->dst[n_CPU].irqs[OPENPIC_OUTPUT_INT]);

    }

}


--- a/source.c
+++ b/source.c
@@ -12,8 +12,8 @@

              perms & AV_PERM_REUSE     ? "u" : "",

+             perms & AV_PERM_REUSE2    ? "U" : "");
+
+    return buf;
+
 }

char *ff_get_ref_perms_string(char *buf, size_t buf_size, int perms)

{

    snprintf(buf, buf_size, "%s%s%s%s%s",

             perms & AV_PERM_READ      ? "r" : "",

             perms & AV_PERM_WRITE     ? "w" : "",

             perms & AV_PERM_PRESERVE  ? "p" : "",

             perms & AV_PERM_REUSE     ? "u" : "",

             perms & AV_PERM_REUSE2    ? "U" : "");

    return buf;

}


--- a/source.c
+++ b/source.c
@@ -7,11 +7,11 @@

     cpu_list_add(cpu);
+
+
+
+    if (tcg_enabled() && !cc->tcg_initialized) {
+
         cc->tcg_initialized = true;

         cc->tcg_initialize();

void cpu_exec_realizefn(CPUState *cpu, Error **errp)

{

    CPUClass *cc = CPU_GET_CLASS(cpu);

    cpu_list_add(cpu);

    if (tcg_enabled() && !cc->tcg_initialized) {

        cc->tcg_initialized = true;

        cc->tcg_initialize();

    }

#ifndef CONFIG_USER_ONLY

    if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {

        vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);

    }

    if (cc->vmsd != NULL) {

        vmstate_register(NULL, cpu->cpu_index, cc->vmsd, cpu);

    }

#endif

}


--- a/source.c
+++ b/source.c
@@ -5,5 +5,5 @@
     PITChannelState *s = &pit->channels[channel];

     return pit_get_out1(s, current_time);
+
+}

int pit_get_out(PITState *pit, int channel, int64_t current_time)

{

    PITChannelState *s = &pit->channels[channel];

    return pit_get_out1(s, current_time);

}


--- a/source.c
+++ b/source.c
@@ -13,11 +13,11 @@
     AVRational frame_rate_q;

+
+    memset(frei0r->params, 0, sizeof(frei0r->params));
+
+
+
     if (args)

         sscanf(args, "%127[^:]:%127[^:]:%1023[^:=]%c%255c",

static av_cold int source_init(AVFilterContext *ctx, const char *args, void *opaque)

{

    Frei0rContext *frei0r = ctx->priv;

    char dl_name[1024], c;

    char frame_size[128] = "";

    char frame_rate[128] = "";

    AVRational frame_rate_q;

    memset(frei0r->params, 0, sizeof(frei0r->params));

    if (args)

        sscanf(args, "%127[^:]:%127[^:]:%1023[^:=]%c%255c",

               frame_size, frame_rate, dl_name, &c, frei0r->params);

    if (av_parse_video_size(&frei0r->w, &frei0r->h, frame_size) < 0) {

        av_log(ctx, AV_LOG_ERROR, "Invalid frame size: '%s'\n", frame_size);

        return AVERROR(EINVAL);

    }

    if (av_parse_video_rate(&frame_rate_q, frame_rate) < 0 ||

        frame_rate_q.den <= 0 || frame_rate_q.num <= 0) {

        av_log(ctx, AV_LOG_ERROR, "Invalid frame rate: '%s'\n", frame_rate);

        return AVERROR(EINVAL);

    }

    frei0r->time_base.num = frame_rate_q.den;

    frei0r->time_base.den = frame_rate_q.num;

    return frei0r_init(ctx, dl_name, F0R_PLUGIN_TYPE_SOURCE);

}


--- a/source.c
+++ b/source.c
@@ -13,11 +13,11 @@
     }
     fmt = NULL;
     while ((fmt1 = av_iformat_next(fmt1))) {
+        if (!is_opened == !(fmt1->flags & AVFMT_NOFILE))
+            continue;
+        score = 0;
+        if (fmt1->read_probe) {
+            score = fmt1->read_probe(&lpd);
             if(fmt1->extensions && av_match_ext(lpd.filename, fmt1->extensions))
                 score = FFMAX(score, nodat ? AVPROBE_SCORE_MAX/4-1 : 1);
         } else if (fmt1->extensions) {

AVInputFormat *av_probe_input_format3(AVProbeData *pd, int is_opened, int *score_ret)
{
    AVProbeData lpd = *pd;
    AVInputFormat *fmt1 = NULL, *fmt;
    int score, nodat = 0, score_max=0;
    if (lpd.buf_size > 10 && ff_id3v2_match(lpd.buf, ID3v2_DEFAULT_MAGIC)) {
        int id3len = ff_id3v2_tag_len(lpd.buf);
        if (lpd.buf_size > id3len + 16) {
            lpd.buf += id3len;
            lpd.buf_size -= id3len;
        }else
            nodat = 1;
    }
    fmt = NULL;
    while ((fmt1 = av_iformat_next(fmt1))) {
        if (!is_opened == !(fmt1->flags & AVFMT_NOFILE))
            continue;
        score = 0;
        if (fmt1->read_probe) {
            score = fmt1->read_probe(&lpd);
            if(fmt1->extensions && av_match_ext(lpd.filename, fmt1->extensions))
                score = FFMAX(score, nodat ? AVPROBE_SCORE_MAX/4-1 : 1);
        } else if (fmt1->extensions) {
            if (av_match_ext(lpd.filename, fmt1->extensions)) {
                score = 50;
            }
        }
        if (score > score_max) {
            score_max = score;
            fmt = fmt1;
        }else if (score == score_max)
            fmt = NULL;
    }
    *score_ret= score_max;
    return fmt;
}


--- a/source.c
+++ b/source.c
@@ -1,5 +1,5 @@
 static void dmg_refresh_limits(BlockDriverState *bs, Error **errp)
+
 {

     bs->request_alignment = BDRV_SECTOR_SIZE; /* No sub-sector I/O supported */

static void dmg_refresh_limits(BlockDriverState *bs, Error **errp)

{

    bs->request_alignment = BDRV_SECTOR_SIZE; /* No sub-sector I/O supported */

}


--- a/source.c
+++ b/source.c
@@ -5,9 +5,9 @@
     struct xlx_ethlite *s = DO_UPCAST(NICState, nc, nc)->opaque;

     int r;
+
+    r = !(s->regs[R_RX_CTRL0] & CTRL_S);
+
     return r;

 }

static int eth_can_rx(NetClientState *nc)

{

    struct xlx_ethlite *s = DO_UPCAST(NICState, nc, nc)->opaque;

    int r;

    r = !(s->regs[R_RX_CTRL0] & CTRL_S);

    return r;

}


static int read_len_table(uint8_t *dst, GetBitContext *gb){

    int i, val, repeat;

    for(i=0; i<256;){

        repeat= get_bits(gb, 3);

        val   = get_bits(gb, 5);

        if(repeat==0)

            repeat= get_bits(gb, 8);

//printf("%d %d\n", val, repeat);

        if(i+repeat > 256) {

            av_log(NULL, AV_LOG_ERROR, "Error reading huffman table\n");

            return -1;

        }

        while (repeat--)

            dst[i++] = val;

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -13,10 +13,10 @@
     QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);

     address_space_destroy_dispatch(as);
+
+    flatview_destroy(as->current_map);
+
+    g_free(as->current_map);
+

 }

void address_space_destroy(AddressSpace *as)

{

    /* Flush out anything from MemoryListeners listening in on this */

    memory_region_transaction_begin();

    as->root = NULL;

    memory_region_transaction_commit();

    QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);

    address_space_destroy_dispatch(as);

    flatview_destroy(as->current_map);

    g_free(as->current_map);

}


--- a/source.c
+++ b/source.c
@@ -1,22 +1,22 @@
+static int ram_decompress_buf(RamDecompressState *s, uint8_t *buf, int len)
+
+{
+
+    int ret, clen;
+
+
+
+    s->zstream.avail_out = len;
+
+    s->zstream.next_out = buf;
+
     while (s->zstream.avail_out > 0) {
+
+        if (s->zstream.avail_in == 0) {
+
             if (qemu_get_be16(s->f) != RAM_CBLOCK_MAGIC)

+                return -1;

             clen = qemu_get_be16(s->f);

static int ram_decompress_buf(RamDecompressState *s, uint8_t *buf, int len)

{

    int ret, clen;

    s->zstream.avail_out = len;

    s->zstream.next_out = buf;

    while (s->zstream.avail_out > 0) {

        if (s->zstream.avail_in == 0) {

            if (qemu_get_be16(s->f) != RAM_CBLOCK_MAGIC)

                return -1;

            clen = qemu_get_be16(s->f);

            if (clen > IOBUF_SIZE)

                return -1;

            qemu_get_buffer(s->f, s->buf, clen);

            s->zstream.avail_in = clen;

            s->zstream.next_in = s->buf;

        }

        ret = inflate(&s->zstream, Z_PARTIAL_FLUSH);

        if (ret != Z_OK && ret != Z_STREAM_END) {

            return -1;

        }

    }

    return 0;

}


static void colored_fputs(int level, int tint, const char *str)

{

    if (!*str)

        return;

    if (use_color < 0)

        check_color_terminal();

#if defined(_WIN32) && !defined(__MINGW32CE__) && HAVE_SETCONSOLETEXTATTRIBUTE

    if (use_color && level != AV_LOG_INFO/8)

        SetConsoleTextAttribute(con, background | color[level]);

    fputs(str, stderr);

    if (use_color && level != AV_LOG_INFO/8)

        SetConsoleTextAttribute(con, attr_orig);

#else

    if (use_color == 1 && level != AV_LOG_INFO/8) {

        fprintf(stderr,

                "\033[%d;3%dm%s\033[0m",

                (color[level] >> 4) & 15,

                color[level] & 15,

                str);

    } else if (tint && use_color == 256) {

        fprintf(stderr,

                "\033[48;5;%dm\033[38;5;%dm%s\033[0m",

                (color[level] >> 16) & 0xff,

                tint,

                str);

    } else if (use_color == 256 && level != AV_LOG_INFO/8) {

        fprintf(stderr,

                "\033[48;5;%dm\033[38;5;%dm%s\033[0m",

                (color[level] >> 16) & 0xff,

                (color[level] >> 8) & 0xff,

                str);

    } else

        fputs(str, stderr);

#endif

}


--- a/source.c
+++ b/source.c
@@ -6,10 +6,10 @@

+    qemu_cond_broadcast(env->halt_cond);
+
+    if (!env->thread_kicked) {
+
         qemu_cpu_kick_thread(env);

         env->thread_kicked = true;

void qemu_cpu_kick(void *_env)

{

    CPUState *env = _env;

    qemu_cond_broadcast(env->halt_cond);

    if (!env->thread_kicked) {

        qemu_cpu_kick_thread(env);

        env->thread_kicked = true;

    }

}


--- a/source.c
+++ b/source.c
@@ -25,11 +25,11 @@

     g_free(filename);
+
+
+
+    if (opts == NULL) {
+
       return;

     }

static void pc_fw_add_pflash_drv(void)

{

    QemuOpts *opts;

    QEMUMachine *machine;

    char *filename;

    if (bios_name == NULL) {

        bios_name = BIOS_FILENAME;

    }

    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);

    opts = drive_add(IF_PFLASH, -1, filename, "readonly=on");

    g_free(filename);

    if (opts == NULL) {

      return;

    }

    machine = find_default_machine();

    if (machine == NULL) {

      return;

    }

    if (!drive_init(opts, machine->use_scsi)) {

        qemu_opts_del(opts);

    }

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
+int spapr_tce_dma_zero(VIOsPAPRDevice *dev, uint64_t taddr, uint32_t size)
+
+{
+
+    /* FIXME: allocating a temp buffer is nasty, but just stepping

      * through writing zeroes is awkward.  This will do for now. */

int spapr_tce_dma_zero(VIOsPAPRDevice *dev, uint64_t taddr, uint32_t size)

{

    /* FIXME: allocating a temp buffer is nasty, but just stepping

     * through writing zeroes is awkward.  This will do for now. */

    uint8_t zeroes[size];

#ifdef DEBUG_TCE

    fprintf(stderr, "spapr_tce_dma_zero taddr=0x%llx size=0x%x\n",

            (unsigned long long)taddr, size);

#endif

    memset(zeroes, 0, size);

    return spapr_tce_dma_write(dev, taddr, zeroes, size);

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
+static int mov_write_gmhd_tag(AVIOContext *pb)
+
+{
+
+    avio_wb32(pb, 0x20);   /* size */

     ffio_wfourcc(pb, "gmhd");

static int mov_write_gmhd_tag(AVIOContext *pb)

{

    avio_wb32(pb, 0x20);   /* size */

    ffio_wfourcc(pb, "gmhd");

    avio_wb32(pb, 0x18);   /* gmin size */

    ffio_wfourcc(pb, "gmin");/* generic media info */

    avio_wb32(pb, 0);      /* version & flags */

    avio_wb16(pb, 0x40);   /* graphics mode = */

    avio_wb16(pb, 0x8000); /* opColor (r?) */

    avio_wb16(pb, 0x8000); /* opColor (g?) */

    avio_wb16(pb, 0x8000); /* opColor (b?) */

    avio_wb16(pb, 0);      /* balance */

    avio_wb16(pb, 0);      /* reserved */

    return 0x20;

}


static inline int get_cabac_cbf_ctx( H264Context *h, int cat, int idx ) {

    int nza, nzb;

    int ctx = 0;

    if( cat == 0 ) {

        nza = h->left_cbp&0x100;

        nzb = h-> top_cbp&0x100;

    } else if( cat == 1 || cat == 2 ) {

        nza = h->non_zero_count_cache[scan8[idx] - 1];

        nzb = h->non_zero_count_cache[scan8[idx] - 8];

    } else if( cat == 3 ) {

        nza = (h->left_cbp>>(6+idx))&0x01;

        nzb = (h-> top_cbp>>(6+idx))&0x01;

    } else {

        assert(cat == 4);

        nza = h->non_zero_count_cache[scan8[16+idx] - 1];

        nzb = h->non_zero_count_cache[scan8[16+idx] - 8];

    }

    if( nza > 0 )

        ctx++;

    if( nzb > 0 )

        ctx += 2;

    return ctx + 4 * cat;

}


--- a/source.c
+++ b/source.c
@@ -4,9 +4,9 @@

                              int ram_size)

+{
+
+    int isa_bios_size;

     MemoryRegion *isa_bios;

static void pc_isa_bios_init(MemoryRegion *rom_memory,

                             MemoryRegion *flash_mem,

                             int ram_size)

{

    int isa_bios_size;

    MemoryRegion *isa_bios;

    uint64_t flash_size;

    void *flash_ptr, *isa_bios_ptr;

    flash_size = memory_region_size(flash_mem);

    /* map the last 128KB of the BIOS in ISA space */

    isa_bios_size = flash_size;

    if (isa_bios_size > (128 * 1024)) {

        isa_bios_size = 128 * 1024;

    }

    isa_bios = g_malloc(sizeof(*isa_bios));

    memory_region_init_ram(isa_bios, NULL, "isa-bios", isa_bios_size);

    vmstate_register_ram_global(isa_bios);

    memory_region_add_subregion_overlap(rom_memory,

                                        0x100000 - isa_bios_size,

                                        isa_bios,

                                        1);

    /* copy ISA rom image from top of flash memory */

    flash_ptr = memory_region_get_ram_ptr(flash_mem);

    isa_bios_ptr = memory_region_get_ram_ptr(isa_bios);

    memcpy(isa_bios_ptr,

           ((uint8_t*)flash_ptr) + (flash_size - isa_bios_size),

           isa_bios_size);

    memory_region_set_readonly(isa_bios, true);

}


--- a/source.c
+++ b/source.c
@@ -1,9 +1,9 @@
 static void kvmppc_pivot_hpt_cpu(CPUState *cs, run_on_cpu_data arg)
+
+{
+
+    target_ulong sdr1 = arg.target_ptr;
+
     PowerPCCPU *cpu = POWERPC_CPU(cs);

     CPUPPCState *env = &cpu->env;

static void kvmppc_pivot_hpt_cpu(CPUState *cs, run_on_cpu_data arg)

{

    target_ulong sdr1 = arg.target_ptr;

    PowerPCCPU *cpu = POWERPC_CPU(cs);

    CPUPPCState *env = &cpu->env;

    /* This is just for the benefit of PR KVM */

    cpu_synchronize_state(cs);

    env->spr[SPR_SDR1] = sdr1;

    if (kvmppc_put_books_sregs(cpu) < 0) {

        error_report("Unable to update SDR1 in KVM");

        exit(1);

    }

}


--- a/source.c
+++ b/source.c
@@ -1,9 +1,9 @@
+static int drive_add(const char *file, const char *fmt, ...)

 {

     va_list ap;
+
     int index = drive_opt_get_free_idx();

static int drive_add(const char *file, const char *fmt, ...)

{

    va_list ap;

    int index = drive_opt_get_free_idx();

    if (nb_drives_opt >= MAX_DRIVES || index == -1) {

        fprintf(stderr, "qemu: too many drives\n");

        exit(1);

    }

    drives_opt[index].file = file;

    va_start(ap, fmt);

    vsnprintf(drives_opt[index].opt,

              sizeof(drives_opt[0].opt), fmt, ap);

    va_end(ap);

    nb_drives_opt++;

    return index;

}


--- a/source.c
+++ b/source.c
@@ -1,18 +1,18 @@
 static inline void RENAME(bgr16ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)
+
+{
+
 	int i;
+
+        assert(src1==src2);
+
+	for(i=0; i<width; i++)
+
+	{
+
+		int d0= ((uint32_t*)src1)[i];
+
+

 		int dl= (d0&0x07E0F81F);

static inline void RENAME(bgr16ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)

{

	int i;

        assert(src1==src2);

	for(i=0; i<width; i++)

	{

		int d0= ((uint32_t*)src1)[i];

		int dl= (d0&0x07E0F81F);

		int dh= ((d0>>5)&0x07C0F83F);

		int dh2= (dh>>11) + (dh<<21);

		int d= dh2 + dl;

		int b= d&0x7F;

		int r= (d>>11)&0x7F;

		int g= d>>21;

		dstU[i]= ((2*RU*r + GU*g + 2*BU*b)>>(RGB2YUV_SHIFT+1-2)) + 128;

		dstV[i]= ((2*RV*r + GV*g + 2*BV*b)>>(RGB2YUV_SHIFT+1-2)) + 128;

	}

}


--- a/source.c
+++ b/source.c
@@ -1,4 +1,4 @@
+static int decode_extradata(ADTSContext *adts, uint8_t *buf, int size)

 {

static int decode_extradata(ADTSContext *adts, uint8_t *buf, int size)

{

    GetBitContext gb;

    init_get_bits(&gb, buf, size * 8);

    adts->objecttype = get_bits(&gb, 5) - 1;

    adts->sample_rate_index = get_bits(&gb, 4);

    adts->channel_conf = get_bits(&gb, 4);

    adts->write_adts = 1;

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -20,11 +20,11 @@

         error_setg_errno(errp, -ret,

+                         "Cannot allocate cluster for LUKS header size %zu",
+
+                         headerlen);
+
+        return -1;

     }

static ssize_t qcow2_crypto_hdr_init_func(QCryptoBlock *block, size_t headerlen,

                                          void *opaque, Error **errp)

{

    BlockDriverState *bs = opaque;

    BDRVQcow2State *s = bs->opaque;

    int64_t ret;

    int64_t clusterlen;

    ret = qcow2_alloc_clusters(bs, headerlen);

    if (ret < 0) {

        error_setg_errno(errp, -ret,

                         "Cannot allocate cluster for LUKS header size %zu",

                         headerlen);

        return -1;

    }

    s->crypto_header.length = headerlen;

    s->crypto_header.offset = ret;

    /* Zero fill remaining space in cluster so it has predictable

     * content in case of future spec changes */

    clusterlen = size_to_clusters(s, headerlen) * s->cluster_size;

    ret = bdrv_pwrite_zeroes(bs->file,

                             ret + headerlen,

                             clusterlen - headerlen, 0);

    if (ret < 0) {

        error_setg_errno(errp, -ret, "Could not zero fill encryption header");

        return -1;

    }

    return ret;

}


--- a/source.c
+++ b/source.c
@@ -8,11 +8,11 @@

         return;

+
+
+    ff_id3v2_read(s, ID3v2_DEFAULT_MAGIC, &id3v2_extra_meta);
+
+    if (id3v2_extra_meta)

         ff_id3v2_parse_apic(s, &id3v2_extra_meta);

static void read_id3(AVFormatContext *s, uint64_t id3pos)

{

    ID3v2ExtraMeta *id3v2_extra_meta = NULL;

    if (avio_seek(s->pb, id3pos, SEEK_SET) < 0)

        return;

    ff_id3v2_read(s, ID3v2_DEFAULT_MAGIC, &id3v2_extra_meta);

    if (id3v2_extra_meta)

        ff_id3v2_parse_apic(s, &id3v2_extra_meta);

    ff_id3v2_free_extra_meta(&id3v2_extra_meta);

}


--- a/source.c
+++ b/source.c
@@ -15,11 +15,11 @@

     /* Attach a menelaus PM chip */
+
+    dev = i2c_create_slave(s->i2c, "twl92230", N8X0_MENELAUS_ADDR);
+
+    qdev_connect_gpio_out(dev, 3, s->cpu->irq[0][OMAP_INT_24XX_SYS_NIRQ]);
+

     /* Attach a TMP105 PM chip (A0 wired to ground) */

static void n8x0_i2c_setup(struct n800_s *s)

{

    DeviceState *dev;

    qemu_irq tmp_irq = qdev_get_gpio_in(s->cpu->gpio, N8X0_TMP105_GPIO);

    /* Attach the CPU on one end of our I2C bus.  */

    s->i2c = omap_i2c_bus(s->cpu->i2c[0]);

    /* Attach a menelaus PM chip */

    dev = i2c_create_slave(s->i2c, "twl92230", N8X0_MENELAUS_ADDR);

    qdev_connect_gpio_out(dev, 3, s->cpu->irq[0][OMAP_INT_24XX_SYS_NIRQ]);

    /* Attach a TMP105 PM chip (A0 wired to ground) */

    dev = i2c_create_slave(s->i2c, "tmp105", N8X0_TMP105_ADDR);

    qdev_connect_gpio_out(dev, 0, tmp_irq);

}


--- a/source.c
+++ b/source.c
@@ -32,11 +32,11 @@

     }

+    if (shift) {
+
+        unsigned long unshifted = reserved_va;
+
+        p++;

         reserved_va <<= shift;

static void handle_arg_reserved_va(const char *arg)

{

    char *p;

    int shift = 0;

    reserved_va = strtoul(arg, &p, 0);

    switch (*p) {

    case 'k':

    case 'K':

        shift = 10;

        break;

    case 'M':

        shift = 20;

        break;

    case 'G':

        shift = 30;

        break;

    }

    if (shift) {

        unsigned long unshifted = reserved_va;

        p++;

        reserved_va <<= shift;

        if (((reserved_va >> shift) != unshifted)

#if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS

            || (reserved_va > (1ul << TARGET_VIRT_ADDR_SPACE_BITS))

#endif

            ) {

            fprintf(stderr, "Reserved virtual address too big\n");

            exit(EXIT_FAILURE);

        }

    }

    if (*p) {

        fprintf(stderr, "Unrecognised -R size suffix '%s'\n", p);

        exit(EXIT_FAILURE);

    }

}


--- a/source.c
+++ b/source.c
@@ -8,10 +8,10 @@

+    /* Determine the security model */
+
     if (fs_ctx->fs_sm == SM_MAPPED) {
+
         err = mknod(rpath(fs_ctx, path), SM_LOCAL_MODE_BITS|S_IFREG, 0);

         if (err == -1) {

static int local_mknod(FsContext *fs_ctx, const char *path, FsCred *credp)

{

    int err = -1;

    int serrno = 0;

    /* Determine the security model */

    if (fs_ctx->fs_sm == SM_MAPPED) {

        err = mknod(rpath(fs_ctx, path), SM_LOCAL_MODE_BITS|S_IFREG, 0);

        if (err == -1) {

            return err;

        }

        local_set_xattr(rpath(fs_ctx, path), credp);

        if (err == -1) {

            serrno = errno;

            goto err_end;

        }

    } else if (fs_ctx->fs_sm == SM_PASSTHROUGH) {

        err = mknod(rpath(fs_ctx, path), credp->fc_mode, credp->fc_rdev);

        if (err == -1) {

            return err;

        }

        err = local_post_create_passthrough(fs_ctx, path, credp);

        if (err == -1) {

            serrno = errno;

            goto err_end;

        }

    }

    return err;

err_end:

    remove(rpath(fs_ctx, path));

    errno = serrno;

    return err;

}


--- a/source.c
+++ b/source.c
@@ -1,5 +1,5 @@
 bool timerlist_has_timers(QEMUTimerList *timer_list)
+
 {

     return !!timer_list->active_timers;

bool timerlist_has_timers(QEMUTimerList *timer_list)

{

    return !!timer_list->active_timers;

}


--- a/source.c
+++ b/source.c
@@ -23,11 +23,11 @@
         off = avio_tell(pb);

         ret = avio_read(pb, buf, ID3v2_HEADER_SIZE);
+
+        if (ret != ID3v2_HEADER_SIZE) {
+
+            avio_seek(pb, off, SEEK_SET);
+
             break;

         }

static void id3v2_read_internal(AVIOContext *pb, AVDictionary **metadata,

                                AVFormatContext *s, const char *magic,

                                ID3v2ExtraMeta **extra_meta)

{

    int len, ret;

    uint8_t buf[ID3v2_HEADER_SIZE];

    int found_header;

    int64_t off;

    do {

        /* save the current offset in case there's nothing to read/skip */

        off = avio_tell(pb);

        ret = avio_read(pb, buf, ID3v2_HEADER_SIZE);

        if (ret != ID3v2_HEADER_SIZE) {

            avio_seek(pb, off, SEEK_SET);

            break;

        }

        found_header = ff_id3v2_match(buf, magic);

        if (found_header) {

            /* parse ID3v2 header */

            len = ((buf[6] & 0x7f) << 21) |

                  ((buf[7] & 0x7f) << 14) |

                  ((buf[8] & 0x7f) << 7) |

                   (buf[9] & 0x7f);

            id3v2_parse(pb, metadata, s, len, buf[3], buf[5], extra_meta);

        } else {

            avio_seek(pb, off, SEEK_SET);

        }

    } while (found_header);

    ff_metadata_conv(metadata, NULL, ff_id3v2_34_metadata_conv);

    ff_metadata_conv(metadata, NULL, id3v2_2_metadata_conv);

    ff_metadata_conv(metadata, NULL, ff_id3v2_4_metadata_conv);

    merge_date(metadata);

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 static void pc_compat_2_0(MachineState *machine)
+
+{
+
     pc_compat_2_1(machine);

     smbios_legacy_mode = true;

static void pc_compat_2_0(MachineState *machine)

{

    pc_compat_2_1(machine);

    smbios_legacy_mode = true;

    has_reserved_memory = false;

    pc_set_legacy_acpi_data_size();

}


--- a/source.c
+++ b/source.c
@@ -25,11 +25,11 @@
         return g_strdup_printf("%sunix:%s%s", prefix,

                                addr->u.q_unix.data->path,
+
+                               is_listen ? ",server" : "");
+
+        break;
+
     case SOCKET_ADDRESS_KIND_FD:

         return g_strdup_printf("%sfd:%s%s", prefix, addr->u.fd.data->str,

static char *SocketAddress_to_str(const char *prefix, SocketAddress *addr,

                                  bool is_listen, bool is_telnet)

{

    switch (addr->type) {

    case SOCKET_ADDRESS_KIND_INET:

        return g_strdup_printf("%s%s:%s:%s%s", prefix,

                               is_telnet ? "telnet" : "tcp",

                               addr->u.inet.data->host,

                               addr->u.inet.data->port,

                               is_listen ? ",server" : "");

        break;

    case SOCKET_ADDRESS_KIND_UNIX:

        return g_strdup_printf("%sunix:%s%s", prefix,

                               addr->u.q_unix.data->path,

                               is_listen ? ",server" : "");

        break;

    case SOCKET_ADDRESS_KIND_FD:

        return g_strdup_printf("%sfd:%s%s", prefix, addr->u.fd.data->str,

                               is_listen ? ",server" : "");

        break;

    default:

        abort();

    }

}


--- a/source.c
+++ b/source.c
@@ -1,4 +1,4 @@
+static int nbd_receive_request(int csock, struct nbd_request *request)

 {

static int nbd_receive_request(int csock, struct nbd_request *request)

{

    uint8_t buf[4 + 4 + 8 + 8 + 4];

    uint32_t magic;

    if (read_sync(csock, buf, sizeof(buf)) != sizeof(buf)) {

        LOG("read failed");

        errno = EINVAL;

        return -1;

    }

    /* Request

       [ 0 ..  3]   magic   (NBD_REQUEST_MAGIC)

       [ 4 ..  7]   type    (0 == READ, 1 == WRITE)

       [ 8 .. 15]   handle

       [16 .. 23]   from

       [24 .. 27]   len

     */

    magic = be32_to_cpup((uint32_t*)buf);

    request->type  = be32_to_cpup((uint32_t*)(buf + 4));

    request->handle = be64_to_cpup((uint64_t*)(buf + 8));

    request->from  = be64_to_cpup((uint64_t*)(buf + 16));

    request->len   = be32_to_cpup((uint32_t*)(buf + 24));

    TRACE("Got request: "

          "{ magic = 0x%x, .type = %d, from = %" PRIu64" , len = %u }",

          magic, request->type, request->from, request->len);

    if (magic != NBD_REQUEST_MAGIC) {

        LOG("invalid magic (got 0x%x)", magic);

        errno = EINVAL;

        return -1;

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -13,11 +13,11 @@
             if (st->codecpar->extradata) {

                 av_freep(&st->codecpar->extradata);
+
+                st->codecpar->extradata_size = 0;
+
+            }
+
             ret = ff_alloc_extradata(st->codecpar,

                                      source_st->codecpar->extradata_size);

static int copy_stream_props(AVStream *st, AVStream *source_st)

{

    int ret;

    if (st->codecpar->codec_id || !source_st->codecpar->codec_id) {

        if (st->codecpar->extradata_size < source_st->codecpar->extradata_size) {

            if (st->codecpar->extradata) {

                av_freep(&st->codecpar->extradata);

                st->codecpar->extradata_size = 0;

            }

            ret = ff_alloc_extradata(st->codecpar,

                                     source_st->codecpar->extradata_size);

            if (ret < 0)

                return ret;

        }

        memcpy(st->codecpar->extradata, source_st->codecpar->extradata,

               source_st->codecpar->extradata_size);

        return 0;

    }

    if ((ret = avcodec_parameters_copy(st->codecpar, source_st->codecpar)) < 0)

        return ret;

    st->r_frame_rate        = source_st->r_frame_rate;

    st->avg_frame_rate      = source_st->avg_frame_rate;

    st->time_base           = source_st->time_base;

    st->sample_aspect_ratio = source_st->sample_aspect_ratio;

    av_dict_copy(&st->metadata, source_st->metadata, 0);

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,9 +1,9 @@
 static void quantize_all(DCAEncContext *c)

+{
+
+    int sample, band, ch;
+

     for (sample = 0; sample < SUBBAND_SAMPLES; sample++)

static void quantize_all(DCAEncContext *c)

{

    int sample, band, ch;

    for (sample = 0; sample < SUBBAND_SAMPLES; sample++)

        for (band = 0; band < 32; band++)

            for (ch = 0; ch < c->fullband_channels; ch++)

                c->quantized[sample][band][ch] = quantize_value(c->subband[sample][band][ch], c->quant[band][ch]);

}


--- a/source.c
+++ b/source.c
@@ -15,7 +15,7 @@

     segments = bytestream_get_le16(&src);
+
     while (segments--) {

         if (mask == 0x10000) {

static int decode_dsw1(uint8_t *frame, int width, int height,

                       const uint8_t *src, const uint8_t *src_end)

{

    const uint8_t *frame_start = frame;

    const uint8_t *frame_end   = frame + width * height;

    int mask = 0x10000, bitbuf = 0;

    int v, offset, count, segments;

    segments = bytestream_get_le16(&src);

    while (segments--) {

        if (mask == 0x10000) {

            if (src >= src_end)

                return -1;

            bitbuf = bytestream_get_le16(&src);

            mask = 1;

        }

        if (src_end - src < 2 || frame_end - frame < 2)

            return -1;

        if (bitbuf & mask) {

            v = bytestream_get_le16(&src);

            offset = (v & 0x1FFF) << 1;

            count = ((v >> 13) + 2) << 1;

            if (frame - offset < frame_start || frame_end - frame < count)

                return -1;

            // can't use av_memcpy_backptr() since it can overwrite following pixels

            for (v = 0; v < count; v++)

                frame[v] = frame[v - offset];

            frame += count;

        } else if (bitbuf & (mask << 1)) {

            frame += bytestream_get_le16(&src);

        } else {

            *frame++ = *src++;

            *frame++ = *src++;

        }

        mask <<= 2;

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,11 +1,11 @@
 static const TPMDriverOps *tpm_driver_find_by_type(enum TpmType type)
+
+{
+
+    int i;

+
     for (i = 0; i < TPM_MAX_DRIVERS && be_drivers[i] != NULL; i++) {

         if (be_drivers[i]->type == type) {

static const TPMDriverOps *tpm_driver_find_by_type(enum TpmType type)

{

    int i;

    for (i = 0; i < TPM_MAX_DRIVERS && be_drivers[i] != NULL; i++) {

        if (be_drivers[i]->type == type) {

            return be_drivers[i];

        }

    }

    return NULL;

}


--- a/source.c
+++ b/source.c
@@ -13,7 +13,7 @@
         return AVPROBE_SCORE_MAX;

     else
+
+        return 0;
+
+}

static int yuv4_probe(AVProbeData *pd)

{

    /* check file header */

    if (pd->buf_size <= sizeof(Y4M_MAGIC))

        return 0;

    if (strncmp(pd->buf, Y4M_MAGIC, sizeof(Y4M_MAGIC)-1)==0)

        return AVPROBE_SCORE_MAX;

    else

        return 0;

}


--- a/source.c
+++ b/source.c
@@ -2,8 +2,8 @@

 {

+    result->rkey = htonl(result->rkey);
+
     result->host_addr = htonll(result->host_addr);

 };

static void result_to_network(RDMARegisterResult *result)

{

    result->rkey = htonl(result->rkey);

    result->host_addr = htonll(result->host_addr);

};


--- a/source.c
+++ b/source.c
@@ -2,11 +2,11 @@

 {

+    if (aiocb->aio_flags & QEMU_AIO_SECTOR_ALIGNED) {
+
+        int i;
+
+

         for (i = 0; i < aiocb->aio_niov; i++)

static int aiocb_needs_copy(struct qemu_paiocb *aiocb)

{

    if (aiocb->aio_flags & QEMU_AIO_SECTOR_ALIGNED) {

        int i;

        for (i = 0; i < aiocb->aio_niov; i++)

            if ((uintptr_t) aiocb->aio_iov[i].iov_base % 512)

                return 1;

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
+static void cabac_init_decoder(HEVCContext *s)

 {

+    GetBitContext *gb = &s->HEVClc->gb;

     skip_bits(gb, 1);

static void cabac_init_decoder(HEVCContext *s)

{

    GetBitContext *gb = &s->HEVClc->gb;

    skip_bits(gb, 1);

    align_get_bits(gb);

    ff_init_cabac_decoder(&s->HEVClc->cc,

                          gb->buffer + get_bits_count(gb) / 8,

                          (get_bits_left(gb) + 7) / 8);

}


--- a/source.c
+++ b/source.c
@@ -24,11 +24,11 @@

         tc[3] = tc0_table[index_a][bS[3]];

+        h->h264dsp.h264_h_loop_filter_luma(pix, stride, alpha, beta, tc);
+
+    } else {
+
+        h->h264dsp.h264_h_loop_filter_luma_intra(pix, stride, alpha, beta);

     }

static void av_always_inline filter_mb_edgev( uint8_t *pix, int stride, int16_t bS[4], unsigned int qp, H264Context *h) {

    const int qp_bd_offset = 6 * (h->sps.bit_depth_luma - 8);

    const unsigned int index_a = qp - qp_bd_offset + h->slice_alpha_c0_offset;

    const int alpha = alpha_table[index_a];

    const int beta  = beta_table[qp - qp_bd_offset + h->slice_beta_offset];

    if (alpha ==0 || beta == 0) return;

    if( bS[0] < 4 ) {

        int8_t tc[4];

        tc[0] = tc0_table[index_a][bS[0]];

        tc[1] = tc0_table[index_a][bS[1]];

        tc[2] = tc0_table[index_a][bS[2]];

        tc[3] = tc0_table[index_a][bS[3]];

        h->h264dsp.h264_h_loop_filter_luma(pix, stride, alpha, beta, tc);

    } else {

        h->h264dsp.h264_h_loop_filter_luma_intra(pix, stride, alpha, beta);

    }

}


--- a/source.c
+++ b/source.c
@@ -13,11 +13,11 @@

     pci_default_write_config(d, address, val, len);
+
+
+
+    if (ranges_overlap(address, len, PCI_COMMAND, 2) ||
+

         /* io base/limit */

void pci_bridge_write_config(PCIDevice *d,

                             uint32_t address, uint32_t val, int len)

{

    PCIBridge *s = PCI_BRIDGE(d);

    uint16_t oldctl = pci_get_word(d->config + PCI_BRIDGE_CONTROL);

    uint16_t newctl;

    pci_default_write_config(d, address, val, len);

    if (ranges_overlap(address, len, PCI_COMMAND, 2) ||

        /* io base/limit */

        ranges_overlap(address, len, PCI_IO_BASE, 2) ||

        /* memory base/limit, prefetchable base/limit and

           io base/limit upper 16 */

        ranges_overlap(address, len, PCI_MEMORY_BASE, 20) ||

        /* vga enable */

        ranges_overlap(address, len, PCI_BRIDGE_CONTROL, 2)) {

        pci_bridge_update_mappings(s);

    }

    newctl = pci_get_word(d->config + PCI_BRIDGE_CONTROL);

    if (~oldctl & newctl & PCI_BRIDGE_CTL_BUS_RESET) {

        /* Trigger hot reset on 0->1 transition. */

        pci_bus_reset(&s->sec_bus);

    }

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 static int proxy_readdir_r(FsContext *ctx, V9fsFidOpenState *fs,
+
+                           struct dirent *entry,

                            struct dirent **result)

static int proxy_readdir_r(FsContext *ctx, V9fsFidOpenState *fs,

                           struct dirent *entry,

                           struct dirent **result)

{

    return readdir_r(fs->dir, entry, result);

}


--- a/source.c
+++ b/source.c
@@ -31,11 +31,11 @@
         if(match) {

             /* A label of a open link. Make it one of the inputs of the next
+
+               filter */
+
+            if(match->type != LinkTypeOut) {
+
                 av_log(log_ctx, AV_LOG_ERROR,

                        "Label \"%s\" appears twice as input!\n", match->name);

static int parse_inputs(const char **buf, AVFilterInOut **currInputs,

                        AVFilterInOut **openLinks, AVClass *log_ctx)

{

    int pad = 0;

    while(**buf == '[') {

        char *name = parse_link_name(buf, log_ctx);

        AVFilterInOut *match;

        if(!name)

            return -1;

        /* First check if the label is not in the openLinks list */

        match = extract_inout(name, openLinks);

        if(match) {

            /* A label of a open link. Make it one of the inputs of the next

               filter */

            if(match->type != LinkTypeOut) {

                av_log(log_ctx, AV_LOG_ERROR,

                       "Label \"%s\" appears twice as input!\n", match->name);

                return -1;

            }

        } else {

            /* Not in the list, so add it as an input */

            match = av_mallocz(sizeof(AVFilterInOut));

            match->name    = name;

            match->type    = LinkTypeIn;

            match->pad_idx = pad;

        }

        insert_inout(currInputs, match);

        *buf += consume_whitespace(*buf);

        pad++;

    }

    return pad;

}


--- a/source.c
+++ b/source.c
@@ -1,5 +1,5 @@
 void do_tw (int flags)
+
 {

     if (!likely(!((Ts0 < Ts1 && (flags & 0x10)) ||

void do_tw (int flags)

{

    if (!likely(!((Ts0 < Ts1 && (flags & 0x10)) ||

                  (Ts0 > Ts1 && (flags & 0x08)) ||

                  (Ts0 == Ts1 && (flags & 0x04)) ||

                  (T0 < T1 && (flags & 0x02)) ||

                  (T0 > T1 && (flags & 0x01)))))

        do_raise_exception_err(EXCP_PROGRAM, EXCP_TRAP);

}


--- a/source.c
+++ b/source.c
@@ -10,7 +10,7 @@
     fd = buf_descriptor->fd;
     av_free(buf_descriptor);
     res = ioctl (fd, VIDIOC_QBUF, &buf);
+    if (res < 0) {
+        av_log(NULL, AV_LOG_ERROR, "ioctl(VIDIOC_QBUF)\n");
+    pkt->data = NULL;
+    pkt->size = 0;

static void mmap_release_buffer(AVPacket *pkt)
{
    struct v4l2_buffer buf;
    int res, fd;
    struct buff_data *buf_descriptor = pkt->priv;
    memset(&buf, 0, sizeof(struct v4l2_buffer));
    buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
    buf.memory = V4L2_MEMORY_MMAP;
    buf.index = buf_descriptor->index;
    fd = buf_descriptor->fd;
    av_free(buf_descriptor);
    res = ioctl (fd, VIDIOC_QBUF, &buf);
    if (res < 0) {
        av_log(NULL, AV_LOG_ERROR, "ioctl(VIDIOC_QBUF)\n");
    pkt->data = NULL;
    pkt->size = 0;


--- a/source.c
+++ b/source.c
@@ -39,11 +39,11 @@
                     sw1 = sw->entries.le_next;

                     if (sw->rate) {
+
+                        st_rate_stop (sw->rate);
+
+                        sw->rate = NULL;
+
                     }

                     LIST_REMOVE (sw, entries);

void AUD_del_capture (CaptureVoiceOut *cap, void *cb_opaque)

{

    struct capture_callback *cb;

    for (cb = cap->cb_head.lh_first; cb; cb = cb->entries.le_next) {

        if (cb->opaque == cb_opaque) {

            cb->ops.destroy (cb_opaque);

            LIST_REMOVE (cb, entries);

            qemu_free (cb);

            if (!cap->cb_head.lh_first) {

                SWVoiceOut *sw = cap->hw.sw_head.lh_first, *sw1;

                while (sw) {

                    SWVoiceCap *sc = (SWVoiceCap *) sw;

#ifdef DEBUG_CAPTURE

                    dolog ("freeing %s\n", sw->name);

#endif

                    sw1 = sw->entries.le_next;

                    if (sw->rate) {

                        st_rate_stop (sw->rate);

                        sw->rate = NULL;

                    }

                    LIST_REMOVE (sw, entries);

                    LIST_REMOVE (sc, entries);

                    qemu_free (sc);

                    sw = sw1;

                }

                LIST_REMOVE (cap, entries);

                qemu_free (cap);

            }

            return;

        }

    }

}


--- a/source.c
+++ b/source.c
@@ -1,5 +1,5 @@
 static void svq3_luma_dc_dequant_idct_c(int16_t *output, int16_t *input, int qp)
+
 {

     const int qmul = svq3_dequant_coeff[qp];
@@ -19,10 +19,10 @@
         const int z0 = 13 * (input[4 * i + 0] +      input[4 * i + 2]);

         const int z1 = 13 * (input[4 * i + 0] -      input[4 * i + 2]);
+
+        const int z2 =  7 *  input[4 * i + 1] - 17 * input[4 * i + 3];
+
+        const int z3 = 17 *  input[4 * i + 1] +  7 * input[4 * i + 3];

static void svq3_luma_dc_dequant_idct_c(int16_t *output, int16_t *input, int qp)

{

    const int qmul = svq3_dequant_coeff[qp];

#define stride 16

    int i;

    int temp[16];

    static const uint8_t x_offset[4] = { 0, 1 * stride, 4 * stride, 5 * stride };

    for (i = 0; i < 4; i++) {

        const int z0 = 13 * (input[4 * i + 0] +      input[4 * i + 2]);

        const int z1 = 13 * (input[4 * i + 0] -      input[4 * i + 2]);

        const int z2 =  7 *  input[4 * i + 1] - 17 * input[4 * i + 3];

        const int z3 = 17 *  input[4 * i + 1] +  7 * input[4 * i + 3];

        temp[4 * i + 0] = z0 + z3;

        temp[4 * i + 1] = z1 + z2;

        temp[4 * i + 2] = z1 - z2;

        temp[4 * i + 3] = z0 - z3;

    }

    for (i = 0; i < 4; i++) {

        const int offset = x_offset[i];

        const int z0     = 13 * (temp[4 * 0 + i] +      temp[4 * 2 + i]);

        const int z1     = 13 * (temp[4 * 0 + i] -      temp[4 * 2 + i]);

        const int z2     =  7 *  temp[4 * 1 + i] - 17 * temp[4 * 3 + i];

        const int z3     = 17 *  temp[4 * 1 + i] +  7 * temp[4 * 3 + i];

        output[stride *  0 + offset] = (z0 + z3) * qmul + 0x80000 >> 20;

        output[stride *  2 + offset] = (z1 + z2) * qmul + 0x80000 >> 20;

        output[stride *  8 + offset] = (z1 - z2) * qmul + 0x80000 >> 20;

        output[stride * 10 + offset] = (z0 - z3) * qmul + 0x80000 >> 20;

    }

}


--- a/source.c
+++ b/source.c
@@ -1,10 +1,10 @@
 static char *ts_value_string (char *buf, int buf_size, int64_t ts)

 {
+
+    if (ts == AV_NOPTS_VALUE) {
+
+        snprintf(buf, buf_size, "N/A");

     } else {

static char *ts_value_string (char *buf, int buf_size, int64_t ts)

{

    if (ts == AV_NOPTS_VALUE) {

        snprintf(buf, buf_size, "N/A");

    } else {

        snprintf(buf, buf_size, "%"PRId64, ts);

    }

    return buf;

}


--- a/source.c
+++ b/source.c
@@ -13,11 +13,11 @@

     switch (pci_get_word(d->config + PCI_CLASS_DEVICE)) {
+
+    case PCI_CLASS_STORAGE_IDE:
+
+        pci_piix3_xen_ide_unplug(DEVICE(d));
+
         break;

static void unplug_disks(PCIBus *b, PCIDevice *d, void *o)

{

    /* We have to ignore passthrough devices */

    if (!strcmp(d->name, "xen-pci-passthrough")) {

        return;

    }

    switch (pci_get_word(d->config + PCI_CLASS_DEVICE)) {

    case PCI_CLASS_STORAGE_IDE:

        pci_piix3_xen_ide_unplug(DEVICE(d));

        break;

    case PCI_CLASS_STORAGE_SCSI:

    case PCI_CLASS_STORAGE_EXPRESS:

        object_unparent(OBJECT(d));

        break;

    default:

        break;

    }

}


--- a/source.c
+++ b/source.c
@@ -5,9 +5,9 @@
     if (offset > sizeof(CPUCRISState)) {

         fprintf(stderr, "wrong store to env at off=%d\n", offset);
+
+    }
+
     tcg_gen_st_tl(tn, cpu_env, offset);

 }

static inline void _t_gen_mov_env_TN(int offset, TCGv tn)

{

    if (offset > sizeof(CPUCRISState)) {

        fprintf(stderr, "wrong store to env at off=%d\n", offset);

    }

    tcg_gen_st_tl(tn, cpu_env, offset);

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 static void qmp_output_end_list(Visitor *v, void **obj)
+
+{

     QmpOutputVisitor *qov = to_qov(v);

static void qmp_output_end_list(Visitor *v, void **obj)

{

    QmpOutputVisitor *qov = to_qov(v);

    QObject *value = qmp_output_pop(qov, obj);

    assert(qobject_type(value) == QTYPE_QLIST);

}


--- a/source.c
+++ b/source.c
@@ -5,11 +5,11 @@
     int datasync;
     size_t offset = 7;
     V9fsFidState *fidp;
+    V9fsPDU *pdu = opaque;
+    V9fsState *s = pdu->s;
+    pdu_unmarshal(pdu, offset, "dd", &fid, &datasync);
+    fidp = get_fid(pdu, fid);
+    if (fidp == NULL) {
         err = -ENOENT;
         goto out_nofid;
     }

static void v9fs_fsync(void *opaque)
{
    int err;
    int32_t fid;
    int datasync;
    size_t offset = 7;
    V9fsFidState *fidp;
    V9fsPDU *pdu = opaque;
    V9fsState *s = pdu->s;
    pdu_unmarshal(pdu, offset, "dd", &fid, &datasync);
    fidp = get_fid(pdu, fid);
    if (fidp == NULL) {
        err = -ENOENT;
        goto out_nofid;
    }
    err = v9fs_co_fsync(pdu, fidp, datasync);
    if (!err) {
        err = offset;
    }
    put_fid(pdu, fidp);
out_nofid:
    complete_pdu(s, pdu, err);
}


--- a/source.c
+++ b/source.c
@@ -4,4 +4,4 @@

     g_source_unref(&ctx->source);

+}

void aio_context_unref(AioContext *ctx)

{

    g_source_unref(&ctx->source);

}


--- a/source.c
+++ b/source.c
@@ -29,11 +29,11 @@
         cpu = cpu_s390x_init(cpu_model);

         cs = CPU(cpu);
+
+
+
+        ipi_states[i] = cpu;
+
         cs->halted = 1;

         cs->exception_index = EXCP_HLT;

void s390_init_cpus(const char *cpu_model)

{

    int i;

    if (cpu_model == NULL) {

        cpu_model = "host";

    }

    ipi_states = g_malloc(sizeof(S390CPU *) * smp_cpus);

    for (i = 0; i < smp_cpus; i++) {

        S390CPU *cpu;

        CPUState *cs;

        cpu = cpu_s390x_init(cpu_model);

        cs = CPU(cpu);

        ipi_states[i] = cpu;

        cs->halted = 1;

        cs->exception_index = EXCP_HLT;

    }

}


--- a/source.c
+++ b/source.c
@@ -17,11 +17,11 @@

     bus = pci_get_bus_devfn(&devfn, devaddr);
+
+    if (!bus) {
+
+        monitor_printf(mon, "Invalid PCI device address %s\n", devaddr);
+
         return NULL;

     }

static PCIDevice *qemu_pci_hot_add_nic(Monitor *mon,

                                       const char *devaddr,

                                       const char *opts_str)

{

    Error *local_err = NULL;

    QemuOpts *opts;

    PCIBus *bus;

    int ret, devfn;

    bus = pci_get_bus_devfn(&devfn, devaddr);

    if (!bus) {

        monitor_printf(mon, "Invalid PCI device address %s\n", devaddr);

        return NULL;

    }

    if (!((BusState*)bus)->allow_hotplug) {

        monitor_printf(mon, "PCI bus doesn't support hotplug\n");

        return NULL;

    }

    opts = qemu_opts_parse(qemu_find_opts("net"), opts_str ? opts_str : "", 0);

    if (!opts) {

        return NULL;

    }

    qemu_opt_set(opts, "type", "nic");

    ret = net_client_init(opts, 0, &local_err);

    if (error_is_set(&local_err)) {

        qerror_report_err(local_err);

        error_free(local_err);

        return NULL;

    }

    if (nd_table[ret].devaddr) {

        monitor_printf(mon, "Parameter addr not supported\n");

        return NULL;

    }

    return pci_nic_init(&nd_table[ret], "rtl8139", devaddr);

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 int tpm_register_model(enum TpmModel model)

 {
+
     int i;

int tpm_register_model(enum TpmModel model)

{

    int i;

    for (i = 0; i < TPM_MAX_MODELS; i++) {

        if (tpm_models[i] == -1) {

            tpm_models[i] = model;

            return 0;

        }

    }

    error_report("Could not register TPM model");

    return 1;

}


--- a/source.c
+++ b/source.c
@@ -3,11 +3,11 @@
                               enum AVIODataMarkerType type, int64_t time)

 {
+
+    char timebuf[30], content[5] = { 0 };
+
+    const char *str;
+
     switch (type) {

     case AVIO_DATA_MARKER_HEADER:         str = "header";   break;

static int io_write_data_type(void *opaque, uint8_t *buf, int size,

                              enum AVIODataMarkerType type, int64_t time)

{

    char timebuf[30], content[5] = { 0 };

    const char *str;

    switch (type) {

    case AVIO_DATA_MARKER_HEADER:         str = "header";   break;

    case AVIO_DATA_MARKER_SYNC_POINT:     str = "sync";     break;

    case AVIO_DATA_MARKER_BOUNDARY_POINT: str = "boundary"; break;

    case AVIO_DATA_MARKER_UNKNOWN:        str = "unknown";  break;

    case AVIO_DATA_MARKER_TRAILER:        str = "trailer";  break;

    }

    if (time == AV_NOPTS_VALUE)

        snprintf(timebuf, sizeof(timebuf), "nopts");

    else

        snprintf(timebuf, sizeof(timebuf), "%"PRId64, time);

    // There can be multiple header/trailer callbacks, only log the box type

    // for header at out_size == 0

    if (type != AVIO_DATA_MARKER_UNKNOWN &&

        type != AVIO_DATA_MARKER_TRAILER &&

        (type != AVIO_DATA_MARKER_HEADER || out_size == 0) &&

        size >= 8)

        memcpy(content, &buf[4], 4);

    else

        snprintf(content, sizeof(content), "-");

    printf("write_data len %d, time %s, type %s atom %s\n", size, timebuf, str, content);

    return io_write(opaque, buf, size);

}


--- a/source.c
+++ b/source.c
@@ -1,4 +1,4 @@
+void qemu_bh_cancel(QEMUBH *bh)

 {

void qemu_bh_cancel(QEMUBH *bh)

{

    bh->scheduled = 0;

}


--- a/source.c
+++ b/source.c
@@ -4,10 +4,10 @@

     if (posix_aio_state) {

+        char byte = 0;
+
+
+
         write(posix_aio_state->wfd, &byte, sizeof(byte));

     }

static void aio_signal_handler(int signum)

{

    if (posix_aio_state) {

        char byte = 0;

        write(posix_aio_state->wfd, &byte, sizeof(byte));

    }

    qemu_service_io();

}


--- a/source.c
+++ b/source.c
@@ -1,9 +1,9 @@
 yuv2422_1_c_template(SwsContext *c, const int16_t *buf0,
+                     const int16_t *ubuf[2], const int16_t *vbuf[2],
+                     const int16_t *abuf0, uint8_t *dest, int dstW,
+                     int uvalpha, int y, enum PixelFormat target)
+{
+    const int16_t *ubuf0 = ubuf[0], *vbuf0 = vbuf[0];
     int i;
     if (uvalpha < 2048) {
         for (i = 0; i < (dstW >> 1); i++) {

yuv2422_1_c_template(SwsContext *c, const int16_t *buf0,
                     const int16_t *ubuf[2], const int16_t *vbuf[2],
                     const int16_t *abuf0, uint8_t *dest, int dstW,
                     int uvalpha, int y, enum PixelFormat target)
{
    const int16_t *ubuf0 = ubuf[0], *vbuf0 = vbuf[0];
    int i;
    if (uvalpha < 2048) {
        for (i = 0; i < (dstW >> 1); i++) {
            int Y1 = buf0[i * 2]     >> 7;
            int Y2 = buf0[i * 2 + 1] >> 7;
            int U  = ubuf0[i]        >> 7;
            int V  = vbuf0[i]        >> 7;
            output_pixels(i * 4, Y1, U, Y2, V);
        }
    } else {
        const int16_t *ubuf1 = ubuf[1], *vbuf1 = vbuf[1];
        for (i = 0; i < (dstW >> 1); i++) {
            int Y1 =  buf0[i * 2]          >> 7;
            int Y2 =  buf0[i * 2 + 1]      >> 7;
            int U  = (ubuf0[i] + ubuf1[i]) >> 8;
            int V  = (vbuf0[i] + vbuf1[i]) >> 8;
            output_pixels(i * 4, Y1, U, Y2, V);
        }
    }
}


--- a/source.c
+++ b/source.c
@@ -5,9 +5,9 @@

+
+
+
     qemu_log ("unknown insn pc=%x opc=%x\n", dc->pc, dc->opcode);

     dc->abort_at_next_insn = 1;

static void dec_null(DisasContext *dc)

{

    qemu_log ("unknown insn pc=%x opc=%x\n", dc->pc, dc->opcode);

    dc->abort_at_next_insn = 1;


--- a/source.c
+++ b/source.c
@@ -1,14 +1,14 @@
 void stellaris_enet_init(NICInfo *nd, uint32_t base, qemu_irq irq)

+{

     stellaris_enet_state *s;
+
+    int iomemtype;

+    qemu_check_nic_model(nd, "stellaris");

void stellaris_enet_init(NICInfo *nd, uint32_t base, qemu_irq irq)

{

    stellaris_enet_state *s;

    int iomemtype;

    qemu_check_nic_model(nd, "stellaris");

    s = (stellaris_enet_state *)qemu_mallocz(sizeof(stellaris_enet_state));

    iomemtype = cpu_register_io_memory(0, stellaris_enet_readfn,

                                       stellaris_enet_writefn, s);

    cpu_register_physical_memory(base, 0x00001000, iomemtype);

    s->irq = irq;

    memcpy(s->macaddr, nd->macaddr, 6);

    if (nd->vlan) {

        s->vc = qemu_new_vlan_client(nd->vlan, nd->model, nd->name,

                                     stellaris_enet_receive, stellaris_enet_can_receive, s);

        qemu_format_nic_info_str(s->vc, s->macaddr);

    }

    stellaris_enet_reset(s);

    register_savevm("stellaris_enet", -1, 1,

                    stellaris_enet_save, stellaris_enet_load, s);

}


--- a/source.c
+++ b/source.c
@@ -4,11 +4,11 @@

     DeviceClass *dc = DEVICE_CLASS(oc);

+    S390FLICStateClass *fsc = S390_FLIC_COMMON_CLASS(oc);
+
+
+
+
     dc->realize = kvm_s390_flic_realize;

     dc->vmsd = &kvm_s390_flic_vmstate;

static void kvm_s390_flic_class_init(ObjectClass *oc, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(oc);

    S390FLICStateClass *fsc = S390_FLIC_COMMON_CLASS(oc);

    dc->realize = kvm_s390_flic_realize;

    dc->vmsd = &kvm_s390_flic_vmstate;

    dc->reset = kvm_s390_flic_reset;

    fsc->register_io_adapter = kvm_s390_register_io_adapter;

    fsc->io_adapter_map = kvm_s390_io_adapter_map;

    fsc->add_adapter_routes = kvm_s390_add_adapter_routes;

    fsc->release_adapter_routes = kvm_s390_release_adapter_routes;

    fsc->clear_io_irq = kvm_s390_clear_io_flic;

}


--- a/source.c
+++ b/source.c
@@ -1,5 +1,5 @@
+int target_to_host_signal(int sig)
+
 {

     if (sig >= _NSIG)

int target_to_host_signal(int sig)

{

    if (sig >= _NSIG)

        return sig;

    return target_to_host_signal_table[sig];

}


--- a/source.c
+++ b/source.c
@@ -14,11 +14,11 @@

     for (row = 4; row--;) {

+        inp0 = src[0];
+
+        src += src_stride;
+
+        inp1 = src[0];

         src += src_stride;

static void intra_predict_horiz_16x16_msa(uint8_t *src, int32_t src_stride,

                                          uint8_t *dst, int32_t dst_stride)

{

    uint32_t row;

    uint8_t inp0, inp1, inp2, inp3;

    v16u8 src0, src1, src2, src3;

    for (row = 4; row--;) {

        inp0 = src[0];

        src += src_stride;

        inp1 = src[0];

        src += src_stride;

        inp2 = src[0];

        src += src_stride;

        inp3 = src[0];

        src += src_stride;

        src0 = (v16u8) __msa_fill_b(inp0);

        src1 = (v16u8) __msa_fill_b(inp1);

        src2 = (v16u8) __msa_fill_b(inp2);

        src3 = (v16u8) __msa_fill_b(inp3);

        ST_UB4(src0, src1, src2, src3, dst, dst_stride);

        dst += (4 * dst_stride);

    }

}


--- a/source.c
+++ b/source.c
@@ -1,9 +1,9 @@
+static void boston_mach_class_init(MachineClass *mc)
+
+{
+
+    mc->desc = "MIPS Boston";
+
     mc->init = boston_mach_init;

     mc->block_default_type = IF_IDE;

static void boston_mach_class_init(MachineClass *mc)

{

    mc->desc = "MIPS Boston";

    mc->init = boston_mach_init;

    mc->block_default_type = IF_IDE;

    mc->default_ram_size = 2 * G_BYTE;

    mc->max_cpus = 16;

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
 static void machine_cpu_reset(MicroBlazeCPU *cpu)
+
+{
+
+    CPUMBState *env = &cpu->env;

static void machine_cpu_reset(MicroBlazeCPU *cpu)

{

    CPUMBState *env = &cpu->env;

    env->pvr.regs[10] = 0x0e000000; /* virtex 6 */

    /* setup pvr to match kernel setting */

    env->pvr.regs[0] |= (0x14 << 8);

    env->pvr.regs[4] = 0xc56b8000;

    env->pvr.regs[5] = 0xc56be000;

}


--- a/source.c
+++ b/source.c
@@ -1,5 +1,5 @@
 void qmp_stop(Error **errp)
+
 {

     vm_stop(RUN_STATE_PAUSED);

void qmp_stop(Error **errp)

{

    vm_stop(RUN_STATE_PAUSED);

}


void bdrv_drain(BlockDriverState *bs)

{

    while (bdrv_drain_one(bs)) {

        /* Keep iterating */

    }

}


--- a/source.c
+++ b/source.c
@@ -27,11 +27,11 @@
         return AVERROR(EINVAL);

+
+    pic = av_frame_alloc();
+
+    if (!pic)
+
         return AVERROR(ENOMEM);

     av_frame_ref(pic, pic_arg);

static int amv_encode_picture(AVCodecContext *avctx, AVPacket *pkt,

                              const AVFrame *pic_arg, int *got_packet)

{

    MpegEncContext *s = avctx->priv_data;

    AVFrame *pic;

    int i, ret;

    int chroma_h_shift, chroma_v_shift;

    av_pix_fmt_get_chroma_sub_sample(avctx->pix_fmt, &chroma_h_shift, &chroma_v_shift);

    //CODEC_FLAG_EMU_EDGE have to be cleared

    if(s->avctx->flags & CODEC_FLAG_EMU_EDGE)

        return AVERROR(EINVAL);

    pic = av_frame_alloc();

    if (!pic)

        return AVERROR(ENOMEM);

    av_frame_ref(pic, pic_arg);

    //picture should be flipped upside-down

    for(i=0; i < 3; i++) {

        int vsample = i ? 2 >> chroma_v_shift : 2;

        pic->data[i] += (pic->linesize[i] * (vsample * (8 * s->mb_height -((s->height/V_MAX)&7)) - 1 ));

        pic->linesize[i] *= -1;

    }

    ret = ff_MPV_encode_picture(avctx, pkt, pic, got_packet);

    av_frame_free(&pic);

    return ret;

}


--- a/source.c
+++ b/source.c
@@ -2,8 +2,8 @@

                        unsigned int datalen, uint64_t offset, bool cache)

+{
+
     return read_write_object(fd, buf, oid, copies, datalen, offset, false,

                              false, cache);

static int read_object(int fd, char *buf, uint64_t oid, int copies,

                       unsigned int datalen, uint64_t offset, bool cache)

{

    return read_write_object(fd, buf, oid, copies, datalen, offset, false,

                             false, cache);

}


--- a/source.c
+++ b/source.c
@@ -1,5 +1,5 @@
 static void *get_surface(const AVFrame *frame)
+
 {

     return frame->data[3];

static void *get_surface(const AVFrame *frame)

{

    return frame->data[3];

}


--- a/source.c
+++ b/source.c
@@ -21,9 +21,9 @@
     g_print("\nresp: %s\n", qstring_get_str(qobject_to_json(resp)));

+
+    qobject_decref(resp);
+
+    QDECREF(req);
+
 }

static void test_dispatch_cmd(void)

{

    QDict *req = qdict_new();

    QObject *resp;

    qdict_put_obj(req, "execute", QOBJECT(qstring_from_str("user_def_cmd")));

    resp = qmp_dispatch(QOBJECT(req));

    assert(resp != NULL);

    assert(!qdict_haskey(qobject_to_qdict(resp), "error"));

    g_print("\nresp: %s\n", qstring_get_str(qobject_to_json(resp)));

    qobject_decref(resp);

    QDECREF(req);

}


--- a/source.c
+++ b/source.c
@@ -64,10 +64,10 @@

 #define GEN_HELPER 2

+#include "helper.h"
+
+
+
+    tcg_target_init(s);

 }

void tcg_context_init(TCGContext *s)

{

    int op, total_args, n;

    TCGOpDef *def;

    TCGArgConstraint *args_ct;

    int *sorted_args;

    memset(s, 0, sizeof(*s));

    s->nb_globals = 0;

    /* Count total number of arguments and allocate the corresponding

       space */

    total_args = 0;

    for(op = 0; op < NB_OPS; op++) {

        def = &tcg_op_defs[op];

        n = def->nb_iargs + def->nb_oargs;

        total_args += n;

    }

    args_ct = g_malloc(sizeof(TCGArgConstraint) * total_args);

    sorted_args = g_malloc(sizeof(int) * total_args);

    for(op = 0; op < NB_OPS; op++) {

        def = &tcg_op_defs[op];

        def->args_ct = args_ct;

        def->sorted_args = sorted_args;

        n = def->nb_iargs + def->nb_oargs;

        sorted_args += n;

        args_ct += n;

    }

    /* Register helpers.  */

#define GEN_HELPER 2

#include "helper.h"

    tcg_target_init(s);

}


--- a/source.c
+++ b/source.c
@@ -1,10 +1,10 @@
+static int armv7m_nvic_init(SysBusDevice *dev)

 {

     nvic_state *s = NVIC(dev);

+    NVICClass *nc = NVIC_GET_CLASS(s);

@@ -13,7 +13,7 @@
     s->gic.num_cpu = 1;

     /* Tell the common code we're an NVIC */
+
     s->gic.revision = 0xffffffff;

     s->num_irq = s->gic.num_irq;

static int armv7m_nvic_init(SysBusDevice *dev)

{

    nvic_state *s = NVIC(dev);

    NVICClass *nc = NVIC_GET_CLASS(s);

    /* The NVIC always has only one CPU */

    s->gic.num_cpu = 1;

    /* Tell the common code we're an NVIC */

    s->gic.revision = 0xffffffff;

    s->num_irq = s->gic.num_irq;

    nc->parent_init(dev);

    gic_init_irqs_and_distributor(&s->gic, s->num_irq);

    /* The NVIC and system controller register area looks like this:

     *  0..0xff : system control registers, including systick

     *  0x100..0xcff : GIC-like registers

     *  0xd00..0xfff : system control registers

     * We use overlaying to put the GIC like registers

     * over the top of the system control register region.

     */

    memory_region_init(&s->container, "nvic", 0x1000);

    /* The system register region goes at the bottom of the priority

     * stack as it covers the whole page.

     */

    memory_region_init_io(&s->sysregmem, &nvic_sysreg_ops, s,

                          "nvic_sysregs", 0x1000);

    memory_region_add_subregion(&s->container, 0, &s->sysregmem);

    /* Alias the GIC region so we can get only the section of it

     * we need, and layer it on top of the system register region.

     */

    memory_region_init_alias(&s->gic_iomem_alias, "nvic-gic", &s->gic.iomem,

                             0x100, 0xc00);

    memory_region_add_subregion_overlap(&s->container, 0x100,

                                        &s->gic_iomem_alias, 1);

    /* Map the whole thing into system memory at the location required

     * by the v7M architecture.

     */

    memory_region_add_subregion(get_system_memory(), 0xe000e000, &s->container);

    s->systick.timer = qemu_new_timer_ns(vm_clock, systick_timer_tick, s);

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 int avfilter_graph_add_filter(AVFilterGraph *graph, AVFilterContext *filter)
+
+{
+
     graph->filters = av_realloc(graph->filters,

                                 sizeof(AVFilterContext*) * ++graph->filter_count);

int avfilter_graph_add_filter(AVFilterGraph *graph, AVFilterContext *filter)

{

    graph->filters = av_realloc(graph->filters,

                                sizeof(AVFilterContext*) * ++graph->filter_count);

    if (!graph->filters)

        return AVERROR(ENOMEM);

    graph->filters[graph->filter_count - 1] = filter;

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -5,9 +5,9 @@
     uint32_t val;

+
+    val = bswap16(cpu_inw(addr & IOPORTS_MASK));
+
     return val;

 }

static uint32_t pci_apb_ioreadw (void *opaque, target_phys_addr_t addr)

{

    uint32_t val;

    val = bswap16(cpu_inw(addr & IOPORTS_MASK));

    return val;

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
 void av_register_input_format(AVInputFormat *format)

+{
+
+    AVInputFormat **p = last_iformat;

void av_register_input_format(AVInputFormat *format)

{

    AVInputFormat **p = last_iformat;

    format->next = NULL;

    while(*p || avpriv_atomic_ptr_cas((void * volatile *)p, NULL, format))

        p = &(*p)->next;

    last_iformat = &format->next;

}


--- a/source.c
+++ b/source.c
@@ -46,11 +46,11 @@

         return;

+    }
+
+    ret = parse(dev, str, ptr);
+
+    error_set_from_qdev_prop_error(errp, ret, dev, prop, str);

     g_free(str);

static void set_pointer(Object *obj, Visitor *v, Property *prop,

                        int (*parse)(DeviceState *dev, const char *str, void **ptr),

                        const char *name, Error **errp)

{

    DeviceState *dev = DEVICE(obj);

    Error *local_err = NULL;

    void **ptr = qdev_get_prop_ptr(dev, prop);

    char *str;

    int ret;

    if (dev->state != DEV_STATE_CREATED) {

        error_set(errp, QERR_PERMISSION_DENIED);

        return;

    }

    visit_type_str(v, &str, name, &local_err);

    if (local_err) {

        error_propagate(errp, local_err);

        return;

    }

    if (!*str) {

        g_free(str);

        *ptr = NULL;

        return;

    }

    ret = parse(dev, str, ptr);

    error_set_from_qdev_prop_error(errp, ret, dev, prop, str);

    g_free(str);

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 static void gen_wrteei(DisasContext *ctx)
+
+{
+
 #if defined(CONFIG_USER_ONLY)

     gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
@@ -10,7 +10,7 @@

     if (unlikely(ctx->pr)) {

+        gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);

         return;

static void gen_wrteei(DisasContext *ctx)

{

#if defined(CONFIG_USER_ONLY)

    gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);

#else

    if (unlikely(ctx->pr)) {

        gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);

        return;

    }

    if (ctx->opcode & 0x00008000) {

        tcg_gen_ori_tl(cpu_msr, cpu_msr, (1 << MSR_EE));

        /* Stop translation to have a chance to raise an exception */

        gen_stop_exception(ctx);

    } else {

        tcg_gen_andi_tl(cpu_msr, cpu_msr, ~(1 << MSR_EE));

    }

#endif

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 static int ogg_new_buf(struct ogg *ogg, int idx)

+{

     struct ogg_stream *os = ogg->streams + idx;

static int ogg_new_buf(struct ogg *ogg, int idx)

{

    struct ogg_stream *os = ogg->streams + idx;

    uint8_t *nb = av_malloc(os->bufsize);

    int size = os->bufpos - os->pstart;

    if(os->buf){

        memcpy(nb, os->buf + os->pstart, size);

        av_free(os->buf);

    }

    os->buf = nb;

    os->bufpos = size;

    os->pstart = 0;

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -9,10 +9,10 @@
     channel_subsys.do_crw_mchk = true;

     channel_subsys.crws_lost = false;
+
+    channel_subsys.chnmon_active = false;
+
+    QTAILQ_INIT(&channel_subsys.io_adapters);

     QTAILQ_INIT(&channel_subsys.indicator_addresses);

static void css_init(void)

{

    QTAILQ_INIT(&channel_subsys.pending_crws);

    channel_subsys.sei_pending = false;

    channel_subsys.do_crw_mchk = true;

    channel_subsys.crws_lost = false;

    channel_subsys.chnmon_active = false;

    QTAILQ_INIT(&channel_subsys.io_adapters);

    QTAILQ_INIT(&channel_subsys.indicator_addresses);

}


--- a/source.c
+++ b/source.c
@@ -1,10 +1,10 @@
 static int qio_channel_command_close(QIOChannel *ioc,

                                      Error **errp)
+
 {

+    QIOChannelCommand *cioc = QIO_CHANNEL_COMMAND(ioc);

     int rv = 0;

static int qio_channel_command_close(QIOChannel *ioc,

                                     Error **errp)

{

    QIOChannelCommand *cioc = QIO_CHANNEL_COMMAND(ioc);

    int rv = 0;

    /* We close FDs before killing, because that

     * gives a better chance of clean shutdown

     */

    if (close(cioc->writefd) < 0) {

        rv = -1;

    }

    if (close(cioc->readfd) < 0) {

        rv = -1;

    }

#ifndef WIN32

    if (qio_channel_command_abort(cioc, errp) < 0) {

        return -1;

    }

#endif

    if (rv < 0) {

        error_setg_errno(errp, errno, "%s",

                         "Unable to close command");

    }

    return rv;

}


--- a/source.c
+++ b/source.c
@@ -5,7 +5,7 @@
 {

     int l2_start_index = l2_index & ~(L1_ENTRIES_PER_SECTOR - 1);
+
     int start_offset = (8 * l2_index) & ~511;

     int end_offset = (8 * (l2_index + num) + 511) & ~511;

static int write_l2_entries(BlockDriverState *bs, uint64_t *l2_table,

    uint64_t l2_offset, int l2_index, int num)

{

    int l2_start_index = l2_index & ~(L1_ENTRIES_PER_SECTOR - 1);

    int start_offset = (8 * l2_index) & ~511;

    int end_offset = (8 * (l2_index + num) + 511) & ~511;

    size_t len = end_offset - start_offset;

    int ret;

    BLKDBG_EVENT(bs->file, BLKDBG_L2_UPDATE);

    ret = bdrv_pwrite(bs->file, l2_offset + start_offset,

        &l2_table[l2_start_index], len);

    if (ret < 0) {

        return ret;

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -9,7 +9,7 @@

     memory_region_init(&s->container_mem, obj, "container", 0x10000000);
+
     sysbus_init_mmio(sbd, &s->container_mem);

static void pxa2xx_pcmcia_initfn(Object *obj)

{

    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);

    PXA2xxPCMCIAState *s = PXA2XX_PCMCIA(obj);

    memory_region_init(&s->container_mem, obj, "container", 0x10000000);

    sysbus_init_mmio(sbd, &s->container_mem);

    /* Socket I/O Memory Space */

    memory_region_init_io(&s->iomem, NULL, &pxa2xx_pcmcia_io_ops, s,

                          "pxa2xx-pcmcia-io", 0x04000000);

    memory_region_add_subregion(&s->container_mem, 0x00000000,

                                &s->iomem);

    /* Then next 64 MB is reserved */

    /* Socket Attribute Memory Space */

    memory_region_init_io(&s->attr_iomem, NULL, &pxa2xx_pcmcia_attr_ops, s,

                          "pxa2xx-pcmcia-attribute", 0x04000000);

    memory_region_add_subregion(&s->container_mem, 0x08000000,

                                &s->attr_iomem);

    /* Socket Common Memory Space */

    memory_region_init_io(&s->common_iomem, NULL, &pxa2xx_pcmcia_common_ops, s,

                          "pxa2xx-pcmcia-common", 0x04000000);

    memory_region_add_subregion(&s->container_mem, 0x0c000000,

                                &s->common_iomem);

    s->slot.irq = qemu_allocate_irqs(pxa2xx_pcmcia_set_irq, s, 1)[0];

    object_property_add_link(obj, "card", TYPE_PCMCIA_CARD,

                             (Object **)&s->card,

                             NULL, /* read-only property */

                             0, NULL);

}


static void network_init(void)

{

    int i;

    for(i = 0; i < nb_nics; i++) {

        NICInfo *nd = &nd_table[i];

        const char *default_devaddr = NULL;

        if (i == 0 && (!nd->model || strcmp(nd->model, "pcnet") == 0))

            /* The malta board has a PCNet card using PCI SLOT 11 */

            default_devaddr = "0b";

        pci_nic_init(nd, "pcnet", default_devaddr);

    }

}


--- a/source.c
+++ b/source.c
@@ -9,7 +9,7 @@

     nom = FFABS(nom)/gcd;
+
     den = FFABS(den)/gcd;

     if(nom<=max && den<=max){

int av_reduce(int *dst_nom, int *dst_den, int64_t nom, int64_t den, int64_t max){

    AVRational a0={0,1}, a1={1,0};

    int sign= (nom<0) ^ (den<0);

    int64_t gcd= ff_gcd(FFABS(nom), FFABS(den));

    nom = FFABS(nom)/gcd;

    den = FFABS(den)/gcd;

    if(nom<=max && den<=max){

        a1= (AVRational){nom, den};

        den=0;

    }

    while(den){

        int64_t x       = nom / den;

        int64_t next_den= nom - den*x;

        int64_t a2n= x*a1.num + a0.num;

        int64_t a2d= x*a1.den + a0.den;

        if(a2n > max || a2d > max){

            if(a1.num) x= (max - a0.num) / a1.num;

            if(a1.den) x= FFMIN(x, (max - a0.den) / a1.den);

            // Won't overflow, sum == original denominator

            if (den*(2*x*a1.den + a0.den) > nom*a1.den)

                a1 = (AVRational){x*a1.num + a0.num, x*a1.den + a0.den};

            break;

        }

        a0= a1;

        a1= (AVRational){a2n, a2d};

        nom= den;

        den= next_den;

    }

    assert(ff_gcd(a1.num, a1.den) == 1);

    *dst_nom = sign ? -a1.num : a1.num;

    *dst_den = a1.den;

    return den==0;

}


--- a/source.c
+++ b/source.c
@@ -28,11 +28,11 @@

         ResetEvent(ctx->event);

+        ReleaseMutex(ctx->mutex);
+
+        if (!pktl) {
+
+            if (s->flags & AVFMT_FLAG_NONBLOCK) {

                 return AVERROR(EAGAIN);

static int dshow_read_packet(AVFormatContext *s, AVPacket *pkt)

{

    struct dshow_ctx *ctx = s->priv_data;

    AVPacketList *pktl = NULL;

    while (!pktl) {

        WaitForSingleObject(ctx->mutex, INFINITE);

        pktl = ctx->pktl;

        if (pktl) {

            *pkt = pktl->pkt;

            ctx->pktl = ctx->pktl->next;

            av_free(pktl);

            ctx->curbufsize -= pkt->size;

        }

        ResetEvent(ctx->event);

        ReleaseMutex(ctx->mutex);

        if (!pktl) {

            if (s->flags & AVFMT_FLAG_NONBLOCK) {

                return AVERROR(EAGAIN);

            } else {

                WaitForSingleObject(ctx->event, INFINITE);

            }

        }

    }

    return pkt->size;

}


--- a/source.c
+++ b/source.c
@@ -8,11 +8,11 @@

+    if (size > INT_MAX) {
+
+        return -EIO;
+
+    }

static int bdrv_check_byte_request(BlockDriverState *bs, int64_t offset,

                                   size_t size)

{

    int64_t len;

    if (size > INT_MAX) {

        return -EIO;

    }

    if (!bdrv_is_inserted(bs))

        return -ENOMEDIUM;

    if (bs->growable)

        return 0;

    len = bdrv_getlength(bs);

    if (offset < 0)

        return -EIO;

    if ((offset > len) || (len - offset < size))

        return -EIO;

    return 0;

}


void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))

{

    unsigned int i;

    for (i = 0; i < ARRAY_SIZE(x86_defs); i++)

        (*cpu_fprintf)(f, "x86 %16s\n", x86_defs[i].name);

}


--- a/source.c
+++ b/source.c
@@ -27,11 +27,11 @@
         return 0;

     size += get_le32(pb);
+
+    blockid = get_le32(pb);
+
+    if (blockid == GSTR_TAG) {
+
         url_fskip(pb, 4);

     } else if (blockid != PT00_TAG) {

static int process_ea_header(AVFormatContext *s) {

    uint32_t blockid, size = 0;

    EaDemuxContext *ea = s->priv_data;

    ByteIOContext *pb = &s->pb;

    blockid = get_le32(pb);

    if (blockid == MVhd_TAG) {

        size = get_le32(pb);

        process_video_header_vp6(s);

        url_fskip(pb, size-32);

        blockid = get_le32(pb);

    }

    if (blockid != SCHl_TAG)

        return 0;

    size += get_le32(pb);

    blockid = get_le32(pb);

    if (blockid == GSTR_TAG) {

        url_fskip(pb, 4);

    } else if (blockid != PT00_TAG) {

        av_log (s, AV_LOG_ERROR, "unknown SCHl headerid\n");

        return 0;

    }

    process_audio_header_elements(s);

    /* skip to the start of the data */

    url_fseek(pb, size, SEEK_SET);

    return 1;

}


--- a/source.c
+++ b/source.c
@@ -1,21 +1,21 @@
 void qvirtqueue_pci_msix_setup(QVirtioPCIDevice *d, QVirtQueuePCI *vqpci,

                                         QGuestAllocator *alloc, uint16_t entry)
+
 {
+
     uint16_t vector;

     uint32_t control;

+    void *addr;
+
+
+
+    g_assert(d->pdev->msix_enabled);

+    addr = d->pdev->msix_table + (entry * 16);
+

     g_assert_cmpint(entry, >=, 0);

void qvirtqueue_pci_msix_setup(QVirtioPCIDevice *d, QVirtQueuePCI *vqpci,

                                        QGuestAllocator *alloc, uint16_t entry)

{

    uint16_t vector;

    uint32_t control;

    void *addr;

    g_assert(d->pdev->msix_enabled);

    addr = d->pdev->msix_table + (entry * 16);

    g_assert_cmpint(entry, >=, 0);

    g_assert_cmpint(entry, <, qpci_msix_table_size(d->pdev));

    vqpci->msix_entry = entry;

    vqpci->msix_addr = guest_alloc(alloc, 4);

    qpci_io_writel(d->pdev, addr + PCI_MSIX_ENTRY_LOWER_ADDR,

                                                    vqpci->msix_addr & ~0UL);

    qpci_io_writel(d->pdev, addr + PCI_MSIX_ENTRY_UPPER_ADDR,

                                            (vqpci->msix_addr >> 32) & ~0UL);

    qpci_io_writel(d->pdev, addr + PCI_MSIX_ENTRY_DATA, vqpci->msix_data);

    control = qpci_io_readl(d->pdev, addr + PCI_MSIX_ENTRY_VECTOR_CTRL);

    qpci_io_writel(d->pdev, addr + PCI_MSIX_ENTRY_VECTOR_CTRL,

                                        control & ~PCI_MSIX_ENTRY_CTRL_MASKBIT);

    qvirtio_pci_queue_select(&d->vdev, vqpci->vq.index);

    qpci_io_writew(d->pdev, d->addr + VIRTIO_MSI_QUEUE_VECTOR, entry);

    vector = qpci_io_readw(d->pdev, d->addr + VIRTIO_MSI_QUEUE_VECTOR);

    g_assert_cmphex(vector, !=, VIRTIO_MSI_NO_VECTOR);

}


--- a/source.c
+++ b/source.c
@@ -3,11 +3,11 @@
 {

     uint64_t token = 0;
+
+    hwaddr pte_offset;
+
+
+
     pte_offset = pte_index * HASH_PTE_SIZE_64;

     if (cpu->env.external_htab == MMU_HASH64_KVM_MANAGED_HPT) {

uint64_t ppc_hash64_start_access(PowerPCCPU *cpu, target_ulong pte_index)

{

    uint64_t token = 0;

    hwaddr pte_offset;

    pte_offset = pte_index * HASH_PTE_SIZE_64;

    if (cpu->env.external_htab == MMU_HASH64_KVM_MANAGED_HPT) {

        /*

         * HTAB is controlled by KVM. Fetch the PTEG into a new buffer.

         */

        token = kvmppc_hash64_read_pteg(cpu, pte_index);

    } else if (cpu->env.external_htab) {

        /*

         * HTAB is controlled by QEMU. Just point to the internally

         * accessible PTEG.

         */

        token = (uint64_t)(uintptr_t) cpu->env.external_htab + pte_offset;

    } else if (cpu->env.htab_base) {

        token = cpu->env.htab_base + pte_offset;

    }

    return token;

}


--- a/source.c
+++ b/source.c
@@ -36,11 +36,11 @@
                     int b = gamma_lookup[*buf++];
 #endif
                     *tmpptr++ = (r << 16) | (g << 8) | b;
+                }
+                s->palettes_count++;
+                break;
+            case SHOT_TAG:
+                if (size < 4)
                 new_pal = bytestream_get_le32(&buf);
                 if (new_pal < s->palettes_count) {
                     s->cur_palette = new_pal;

static int xan_decode_frame(AVCodecContext *avctx,
                            void *data, int *data_size,
                            AVPacket *avpkt)
{
    const uint8_t *buf = avpkt->data;
    int ret, buf_size = avpkt->size;
    XanContext *s = avctx->priv_data;
    if (avctx->codec->id == CODEC_ID_XAN_WC3) {
        const uint8_t *buf_end = buf + buf_size;
        int tag = 0;
        while (buf_end - buf > 8 && tag != VGA__TAG) {
            unsigned *tmpptr;
            uint32_t new_pal;
            int size;
            int i;
            tag  = bytestream_get_le32(&buf);
            size = bytestream_get_be32(&buf);
            size = FFMIN(size, buf_end - buf);
            switch (tag) {
            case PALT_TAG:
                if (size < PALETTE_SIZE)
                if (s->palettes_count >= PALETTES_MAX)
                tmpptr = av_realloc(s->palettes, (s->palettes_count + 1) * AVPALETTE_SIZE);
                if (!tmpptr)
                    return AVERROR(ENOMEM);
                s->palettes = tmpptr;
                tmpptr += s->palettes_count * AVPALETTE_COUNT;
                for (i = 0; i < PALETTE_COUNT; i++) {
#if RUNTIME_GAMMA
                    int r = gamma_corr(*buf++);
                    int g = gamma_corr(*buf++);
                    int b = gamma_corr(*buf++);
#else
                    int r = gamma_lookup[*buf++];
                    int g = gamma_lookup[*buf++];
                    int b = gamma_lookup[*buf++];
#endif
                    *tmpptr++ = (r << 16) | (g << 8) | b;
                }
                s->palettes_count++;
                break;
            case SHOT_TAG:
                if (size < 4)
                new_pal = bytestream_get_le32(&buf);
                if (new_pal < s->palettes_count) {
                    s->cur_palette = new_pal;
                } else
                    av_log(avctx, AV_LOG_ERROR, "Invalid palette selected\n");
                break;
            case VGA__TAG:
                break;
            default:
                buf += size;
                break;
            }
        }
        buf_size = buf_end - buf;
    }
    if ((ret = avctx->get_buffer(avctx, &s->current_frame))) {
        av_log(s->avctx, AV_LOG_ERROR, "get_buffer() failed\n");
        return ret;
    }
    s->current_frame.reference = 3;
    if (!s->frame_size)
        s->frame_size = s->current_frame.linesize[0] * s->avctx->height;
    memcpy(s->current_frame.data[1], s->palettes + s->cur_palette * AVPALETTE_COUNT, AVPALETTE_SIZE);
    s->buf = buf;
    s->size = buf_size;
    if (xan_wc3_decode_frame(s) < 0)
    /* release the last frame if it is allocated */
    if (s->last_frame.data[0])
        avctx->release_buffer(avctx, &s->last_frame);
    *data_size = sizeof(AVFrame);
    *(AVFrame*)data = s->current_frame;
    /* shuffle frames */
    FFSWAP(AVFrame, s->current_frame, s->last_frame);
    /* always report that the buffer was completely consumed */
    return buf_size;
}