--- a/source.c
+++ b/source.c
@@ -1,4 +1,4 @@
+static int add_shorts_metadata(int count, const char *name,

                                const char *sep, TiffContext *s)

@@ -11,7 +11,7 @@
     int16_t *sp;

+
     if (count >= INT_MAX / sizeof(int16_t) || count <= 0)

         return AVERROR_INVALIDDATA;

static int add_shorts_metadata(int count, const char *name,

                               const char *sep, TiffContext *s)

{

    char *ap;

    int i;

    int16_t *sp;

    if (count >= INT_MAX / sizeof(int16_t) || count <= 0)

        return AVERROR_INVALIDDATA;

    if (bytestream2_get_bytes_left(&s->gb) < count * sizeof(int16_t))

        return AVERROR_INVALIDDATA;

    sp = av_malloc(count * sizeof(int16_t));

    if (!sp)

        return AVERROR(ENOMEM);

    for (i = 0; i < count; i++)

        sp[i] = tget_short(&s->gb, s->le);

    ap = shorts2str(sp, count, sep);

    av_freep(&sp);

    if (!ap)

        return AVERROR(ENOMEM);

    av_dict_set(avpriv_frame_get_metadatap(&s->picture), name, ap, AV_DICT_DONT_STRDUP_VAL);

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,11 +1,11 @@
 static const char *local_mapped_attr_path(FsContext *ctx,

+                                          const char *path, char *buffer)

 {

     char *dir_name;
+
     char *tmp_path = strdup(path);

     char *base_name = basename(tmp_path);

static const char *local_mapped_attr_path(FsContext *ctx,

                                          const char *path, char *buffer)

{

    char *dir_name;

    char *tmp_path = strdup(path);

    char *base_name = basename(tmp_path);

    /* NULL terminate the directory */

    dir_name = tmp_path;

    *(base_name - 1) = '\0';

    snprintf(buffer, PATH_MAX, "%s/%s/%s/%s",

             ctx->fs_root, dir_name, VIRTFS_META_DIR, base_name);

    free(tmp_path);

    return buffer;

}


--- a/source.c
+++ b/source.c
@@ -8,7 +8,7 @@

     if (strcmp(arg, "none") == 0) {

+        return 0;

     }

static int balloon_parse(const char *arg)

{

    QemuOpts *opts;

    if (strcmp(arg, "none") == 0) {

        return 0;

    }

    if (!strncmp(arg, "virtio", 6)) {

        if (arg[6] == ',') {

            /* have params -> parse them */

            opts = qemu_opts_parse(qemu_find_opts("device"), arg+7, 0);

            if (!opts)

                return  -1;

        } else {

            /* create empty opts */

            opts = qemu_opts_create(qemu_find_opts("device"), NULL, 0);

        }

        qemu_opt_set(opts, "driver", "virtio-balloon");

        return 0;

    }

    return -1;

}


--- a/source.c
+++ b/source.c
@@ -3,11 +3,11 @@
 {

     PCIBridge *s = DO_UPCAST(PCIBridge, dev, dev);
+
+
+
+    pci_config_set_vendor_id(s->dev.config, s->vid);
+
     pci_config_set_device_id(s->dev.config, s->did);

static int pci_bridge_initfn(PCIDevice *dev)

{

    PCIBridge *s = DO_UPCAST(PCIBridge, dev, dev);

    pci_config_set_vendor_id(s->dev.config, s->vid);

    pci_config_set_device_id(s->dev.config, s->did);

    s->dev.config[0x04] = 0x06; // command = bus master, pci mem

    s->dev.config[0x05] = 0x00;

    s->dev.config[0x06] = 0xa0; // status = fast back-to-back, 66MHz, no error

    s->dev.config[0x07] = 0x00; // status = fast devsel

    s->dev.config[0x08] = 0x00; // revision

    s->dev.config[0x09] = 0x00; // programming i/f

    pci_config_set_class(s->dev.config, PCI_CLASS_BRIDGE_PCI);

    s->dev.config[0x0D] = 0x10; // latency_timer

    s->dev.config[PCI_HEADER_TYPE] =

        PCI_HEADER_TYPE_MULTI_FUNCTION | PCI_HEADER_TYPE_BRIDGE; // header_type

    s->dev.config[0x1E] = 0xa0; // secondary status

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -7,7 +7,7 @@
     VFIOPlatformDevice *vdev =

         container_of(vbasedev, VFIOPlatformDevice, vbasedev);
+

     qemu_mutex_lock(&vdev->intp_mutex);

static void vfio_platform_eoi(VFIODevice *vbasedev)

{

    VFIOINTp *intp;

    VFIOPlatformDevice *vdev =

        container_of(vbasedev, VFIOPlatformDevice, vbasedev);

    qemu_mutex_lock(&vdev->intp_mutex);

    QLIST_FOREACH(intp, &vdev->intp_list, next) {

        if (intp->state == VFIO_IRQ_ACTIVE) {

            trace_vfio_platform_eoi(intp->pin,

                                event_notifier_get_fd(intp->interrupt));

            intp->state = VFIO_IRQ_INACTIVE;

            /* deassert the virtual IRQ */

            qemu_set_irq(intp->qemuirq, 0);

            if (intp->flags & VFIO_IRQ_INFO_AUTOMASKED) {

                /* unmasks the physical level-sensitive IRQ */

                vfio_unmask_single_irqindex(vbasedev, intp->pin);

            }

            /* a single IRQ can be active at a time */

            break;

        }

    }

    /* in case there are pending IRQs, handle the first one */

    if (!QSIMPLEQ_EMPTY(&vdev->pending_intp_queue)) {

        intp = QSIMPLEQ_FIRST(&vdev->pending_intp_queue);

        vfio_intp_inject_pending_lockheld(intp);

        QSIMPLEQ_REMOVE_HEAD(&vdev->pending_intp_queue, pqnext);

    }

    qemu_mutex_unlock(&vdev->intp_mutex);

}


--- a/source.c
+++ b/source.c
@@ -15,7 +15,7 @@
         bdrv_mon_event(s->bs, BDRV_ACTION_IGNORE, is_read);

         return 0;
+
     }

static int scsi_handle_rw_error(SCSIDiskReq *r, int error, int type)

{

    int is_read = (type == SCSI_REQ_STATUS_RETRY_READ);

    SCSIDiskState *s = DO_UPCAST(SCSIDiskState, qdev, r->req.dev);

    BlockErrorAction action = bdrv_get_on_error(s->bs, is_read);

    if (action == BLOCK_ERR_IGNORE) {

        bdrv_mon_event(s->bs, BDRV_ACTION_IGNORE, is_read);

        return 0;

    }

    if ((error == ENOSPC && action == BLOCK_ERR_STOP_ENOSPC)

            || action == BLOCK_ERR_STOP_ANY) {

        type &= SCSI_REQ_STATUS_RETRY_TYPE_MASK;

        r->status |= SCSI_REQ_STATUS_RETRY | type;

        bdrv_mon_event(s->bs, BDRV_ACTION_STOP, is_read);

        vm_stop(VMSTOP_DISKFULL);

    } else {

        if (type == SCSI_REQ_STATUS_RETRY_READ) {

            scsi_req_data(&r->req, 0);

        }

        scsi_command_complete(r, CHECK_CONDITION,

                HARDWARE_ERROR);

        bdrv_mon_event(s->bs, BDRV_ACTION_REPORT, is_read);

    }

    return 1;

}


--- a/source.c
+++ b/source.c
@@ -54,11 +54,11 @@

         break;

+    default:
+
+        val = 0xff;
+
+        break;

     }

static uint64_t bmdma_read(void *opaque, target_phys_addr_t addr,

                           unsigned size)

{

    BMDMAState *bm = opaque;

    PCIIDEState *pci_dev = bm->pci_dev;

    uint32_t val;

    if (size != 1) {

        return ((uint64_t)1 << (size * 8)) - 1;

    }

    switch(addr & 3) {

    case 0:

        val = bm->cmd;

        break;

    case 1:

        val = pci_dev->dev.config[MRDMODE];

        break;

    case 2:

        val = bm->status;

        break;

    case 3:

        if (bm == &pci_dev->bmdma[0]) {

            val = pci_dev->dev.config[UDIDETCR0];

        } else {

            val = pci_dev->dev.config[UDIDETCR1];

        }

        break;

    default:

        val = 0xff;

        break;

    }

#ifdef DEBUG_IDE

    printf("bmdma: readb 0x%02x : 0x%02x\n", addr, val);

#endif

    return val;

}


--- a/source.c
+++ b/source.c
@@ -1,4 +1,4 @@
+static void pc_init_pci_1_5(QEMUMachineInitArgs *args)

 {

static void pc_init_pci_1_5(QEMUMachineInitArgs *args)

{

    has_pci_info = false;

    pc_init_pci(args);

}


--- a/source.c
+++ b/source.c
@@ -2,11 +2,11 @@

                                 Error **errp)

+{
+
+    VirtIODevice *vdev = VIRTIO_DEVICE(hotplug_dev);
+
+    VirtIOSCSI *s = VIRTIO_SCSI(vdev);

     SCSIDevice *sd = SCSI_DEVICE(dev);

static void virtio_scsi_hotplug(HotplugHandler *hotplug_dev, DeviceState *dev,

                                Error **errp)

{

    VirtIODevice *vdev = VIRTIO_DEVICE(hotplug_dev);

    VirtIOSCSI *s = VIRTIO_SCSI(vdev);

    SCSIDevice *sd = SCSI_DEVICE(dev);

    if (s->ctx && !s->dataplane_disabled) {

        if (blk_op_is_blocked(sd->conf.blk, BLOCK_OP_TYPE_DATAPLANE, errp)) {

            return;

        }

        blk_op_block_all(sd->conf.blk, s->blocker);

    }

    if ((vdev->guest_features >> VIRTIO_SCSI_F_HOTPLUG) & 1) {

        virtio_scsi_push_event(s, sd,

                               VIRTIO_SCSI_T_TRANSPORT_RESET,

                               VIRTIO_SCSI_EVT_RESET_RESCAN);

    }

}


--- a/source.c
+++ b/source.c
@@ -37,11 +37,11 @@
     case R_IER:

     case R_LCR:
+
+    case R_MCR:
+
+    case R_DIV:
+
         error_report("lm32_uart: read access to write only register 0x"

                 TARGET_FMT_plx, addr << 2);

static uint64_t uart_read(void *opaque, target_phys_addr_t addr,

                          unsigned size)

{

    LM32UartState *s = opaque;

    uint32_t r = 0;

    addr >>= 2;

    switch (addr) {

    case R_RXTX:

        r = s->regs[R_RXTX];

        s->regs[R_LSR] &= ~LSR_DR;

        uart_update_irq(s);

        break;

    case R_IIR:

    case R_LSR:

    case R_MSR:

        r = s->regs[addr];

        break;

    case R_IER:

    case R_LCR:

    case R_MCR:

    case R_DIV:

        error_report("lm32_uart: read access to write only register 0x"

                TARGET_FMT_plx, addr << 2);

        break;

    default:

        error_report("lm32_uart: read access to unknown register 0x"

                TARGET_FMT_plx, addr << 2);

        break;

    }

    trace_lm32_uart_memory_read(addr << 2, r);

    return r;

}


--- a/source.c
+++ b/source.c
@@ -5,11 +5,11 @@
 {

     int nfds = -1;
+
     int i;

+
     for (i = 0; i < pollfds->len; i++) {

         GPollFD *pfd = &g_array_index(pollfds, GPollFD, i);

static int pollfds_fill(GArray *pollfds, fd_set *rfds, fd_set *wfds,

                        fd_set *xfds)

{

    int nfds = -1;

    int i;

    for (i = 0; i < pollfds->len; i++) {

        GPollFD *pfd = &g_array_index(pollfds, GPollFD, i);

        int fd = pfd->fd;

        int events = pfd->events;

        if (events & (G_IO_IN | G_IO_HUP | G_IO_ERR)) {

            FD_SET(fd, rfds);

            nfds = MAX(nfds, fd);

        }

        if (events & (G_IO_OUT | G_IO_ERR)) {

            FD_SET(fd, wfds);

            nfds = MAX(nfds, fd);

        }

        if (events & G_IO_PRI) {

            FD_SET(fd, xfds);

            nfds = MAX(nfds, fd);

        }

    }

    return nfds;

}


--- a/source.c
+++ b/source.c
@@ -2,7 +2,7 @@

 {

+    memory_content *current = env->movcal_backup;

void helper_discard_movcal_backup(CPUSH4State *env)

{

    memory_content *current = env->movcal_backup;

    while(current)

    {

	memory_content *next = current->next;

	free (current);

	env->movcal_backup = current = next;

	if (current == NULL)

	    env->movcal_backup_tail = &(env->movcal_backup);

    }

}


--- a/source.c
+++ b/source.c
@@ -4,10 +4,10 @@

     V9fsSynthOpenState *synth_open = fs->private;

+    V9fsSynthNode *node = synth_open->node;
+
+
+
     node->open_count--;

     g_free(synth_open);

static int v9fs_synth_close(FsContext *ctx, V9fsFidOpenState *fs)

{

    V9fsSynthOpenState *synth_open = fs->private;

    V9fsSynthNode *node = synth_open->node;

    node->open_count--;

    g_free(synth_open);

    fs->private = NULL;

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -14,9 +14,9 @@

     dc->bus_type = TYPE_XENSYSBUS;

+
+
+
+
+
 }

static void xen_sysdev_class_init(ObjectClass *klass, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(klass);

    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);

    k->init = xen_sysdev_init;

    dc->props = xen_sysdev_properties;

    dc->bus_type = TYPE_XENSYSBUS;

}


--- a/source.c
+++ b/source.c
@@ -13,7 +13,7 @@
         acb->bh = aio_bh_new(bdrv_get_aio_context(bs), bdrv_co_em_bh, acb);

         qemu_bh_schedule(acb->bh);
+
+    }
+
+}

static void bdrv_co_maybe_schedule_bh(BlockAIOCBCoroutine *acb)

{

    acb->need_bh = false;

    if (acb->req.error != -EINPROGRESS) {

        BlockDriverState *bs = acb->common.bs;

        acb->bh = aio_bh_new(bdrv_get_aio_context(bs), bdrv_co_em_bh, acb);

        qemu_bh_schedule(acb->bh);

    }

}


--- a/source.c
+++ b/source.c
@@ -3,7 +3,7 @@
                       const char *path, const char *name)

 {
+
     XattrOperations *xops = get_xattr_operations(ctx->xops, name);

     if (xops) {

int v9fs_remove_xattr(FsContext *ctx,

                      const char *path, const char *name)

{

    XattrOperations *xops = get_xattr_operations(ctx->xops, name);

    if (xops) {

        return xops->removexattr(ctx, path, name);

    }

    errno = -EOPNOTSUPP;

    return -1;

}


--- a/source.c
+++ b/source.c
@@ -23,7 +23,7 @@
     }

     if (get_bits1(gb)) {
+
         v = get_bits(gb, 4);

         memset(b->cur_dec, v, t);

static int read_block_types(AVCodecContext *avctx, GetBitContext *gb, Bundle *b)

{

    int t, v;

    int last = 0;

    const uint8_t *dec_end;

    CHECK_READ_VAL(gb, b, t);

    dec_end = b->cur_dec + t;

    if (dec_end > b->data_end) {

        av_log(avctx, AV_LOG_ERROR, "Too many block type values\n");

        return -1;

    }

    if (get_bits1(gb)) {

        v = get_bits(gb, 4);

        memset(b->cur_dec, v, t);

        b->cur_dec += t;

    } else {

        do {

            v = GET_HUFF(gb, b->tree);

            if (v < 12) {

                last = v;

                *b->cur_dec++ = v;

            } else {

                int run = bink_rlelens[v - 12];

                memset(b->cur_dec, last, run);

                b->cur_dec += run;

            }

        } while (b->cur_dec < dec_end);

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -4,11 +4,11 @@

     if (!bdrv_is_removable(bs)) {

+        qerror_report(QERR_DEVICE_NOT_REMOVABLE, bdrv_get_device_name(bs));
+
+        return -1;
+
+    }

     if (!force && bdrv_dev_is_medium_locked(bs)) {

static int eject_device(Monitor *mon, BlockDriverState *bs, int force)

{

    if (!bdrv_is_removable(bs)) {

        qerror_report(QERR_DEVICE_NOT_REMOVABLE, bdrv_get_device_name(bs));

        return -1;

    }

    if (!force && bdrv_dev_is_medium_locked(bs)) {

        qerror_report(QERR_DEVICE_LOCKED, bdrv_get_device_name(bs));

        return -1;

    }

    bdrv_close(bs);

    return 0;

}


static void port92_write(void *opaque, hwaddr addr, uint64_t val,

                         unsigned size)

{

    Port92State *s = opaque;

    int oldval = s->outport;

    DPRINTF("port92: write 0x%02" PRIx64 "\n", val);

    s->outport = val;

    qemu_set_irq(*s->a20_out, (val >> 1) & 1);

    if ((val & 1) && !(oldval & 1)) {

        qemu_system_reset_request();

    }

}


--- a/source.c
+++ b/source.c
@@ -1,4 +1,4 @@
+static void boston_flash_write(void *opaque, hwaddr addr,

                                uint64_t val, unsigned size)

static void boston_flash_write(void *opaque, hwaddr addr,

                               uint64_t val, unsigned size)

{

}


--- a/source.c
+++ b/source.c
@@ -8,11 +8,11 @@

+    set_dirty_tracking(0);
+
+
+
+    while ((bmds = QSIMPLEQ_FIRST(&block_mig_state.bmds_list)) != NULL) {

         QSIMPLEQ_REMOVE_HEAD(&block_mig_state.bmds_list, entry);

static void blk_mig_cleanup(Monitor *mon)

{

    BlkMigDevState *bmds;

    BlkMigBlock *blk;

    set_dirty_tracking(0);

    while ((bmds = QSIMPLEQ_FIRST(&block_mig_state.bmds_list)) != NULL) {

        QSIMPLEQ_REMOVE_HEAD(&block_mig_state.bmds_list, entry);

        bdrv_set_in_use(bmds->bs, 0);

        drive_put_ref(drive_get_by_blockdev(bmds->bs));

        g_free(bmds->aio_bitmap);

        g_free(bmds);

    }

    while ((blk = QSIMPLEQ_FIRST(&block_mig_state.blk_list)) != NULL) {

        QSIMPLEQ_REMOVE_HEAD(&block_mig_state.blk_list, entry);

        g_free(blk->buf);

        g_free(blk);

    }

    monitor_printf(mon, "\n");

}


--- a/source.c
+++ b/source.c
@@ -3,5 +3,5 @@
 {

     qemu_notify_event();
+
 }

void qemu_timer_notify_cb(void *opaque, QEMUClockType type)

{

    qemu_notify_event();

}


--- a/source.c
+++ b/source.c
@@ -1,11 +1,11 @@
 int ff_rtsp_send_cmd_with_content(AVFormatContext *s,

                                   const char *method, const char *url,
+
                                   const char *header,

                                   RTSPMessageHeader *reply,
+
                                   unsigned char **content_ptr,

                                   const unsigned char *send_content,

int ff_rtsp_send_cmd_with_content(AVFormatContext *s,

                                  const char *method, const char *url,

                                  const char *header,

                                  RTSPMessageHeader *reply,

                                  unsigned char **content_ptr,

                                  const unsigned char *send_content,

                                  int send_content_length)

{

    RTSPState *rt = s->priv_data;

    HTTPAuthType cur_auth_type;

    int ret;

retry:

    cur_auth_type = rt->auth_state.auth_type;

    if ((ret = ff_rtsp_send_cmd_with_content_async(s, method, url, header,

                                                   send_content,

                                                   send_content_length)))

        return ret;

    if ((ret = ff_rtsp_read_reply(s, reply, content_ptr, 0, method) ) < 0)

        return ret;

    if (reply->status_code == 401 && cur_auth_type == HTTP_AUTH_NONE &&

        rt->auth_state.auth_type != HTTP_AUTH_NONE)

        goto retry;

    if (reply->status_code > 400){

        av_log(s, AV_LOG_ERROR, "method %s failed: %d%s\n",

               method,

               reply->status_code,

               reply->reason);

        av_log(s, AV_LOG_DEBUG, "%s\n", rt->last_reply);

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,10 +1,10 @@
 static BlockDriverAIOCB *hdev_aio_ioctl(BlockDriverState *bs,

         unsigned long int req, void *buf,
+
+        BlockDriverCompletionFunc *cb, void *opaque)
+
+{

     BDRVRawState *s = bs->opaque;

static BlockDriverAIOCB *hdev_aio_ioctl(BlockDriverState *bs,

        unsigned long int req, void *buf,

        BlockDriverCompletionFunc *cb, void *opaque)

{

    BDRVRawState *s = bs->opaque;

    if (fd_open(bs) < 0)

        return NULL;

    return paio_ioctl(bs, s->fd, req, buf, cb, opaque);

}


--- a/source.c
+++ b/source.c
@@ -1,28 +1,28 @@
 void HELPER(cksm)(uint32_t r1, uint32_t r2)

 {
+
     uint64_t src = get_address_31fix(r2);

+    uint64_t src_len = env->regs[(r2 + 1) & 15];

     uint64_t cksm = 0;

+    while (src_len >= 4) {

         cksm += ldl(src);
+
         cksm = cksm_overflow(cksm);

+
+
         /* move to next word */

         src_len -= 4;

+        src += 4;

     }

void HELPER(cksm)(uint32_t r1, uint32_t r2)

{

    uint64_t src = get_address_31fix(r2);

    uint64_t src_len = env->regs[(r2 + 1) & 15];

    uint64_t cksm = 0;

    while (src_len >= 4) {

        cksm += ldl(src);

        cksm = cksm_overflow(cksm);

        /* move to next word */

        src_len -= 4;

        src += 4;

    }

    switch (src_len) {

    case 0:

        break;

    case 1:

        cksm += ldub(src);

        cksm = cksm_overflow(cksm);

        break;

    case 2:

        cksm += lduw(src);

        cksm = cksm_overflow(cksm);

        break;

    case 3:

        /* XXX check if this really is correct */

        cksm += lduw(src) << 8;

        cksm += ldub(src + 2);

        cksm = cksm_overflow(cksm);

        break;

    }

    /* indicate we've processed everything */

    env->regs[(r2 + 1) & 15] = 0;

    /* store result */

    env->regs[r1] = (env->regs[r1] & 0xffffffff00000000ULL) | (uint32_t)cksm;

}


--- a/source.c
+++ b/source.c
@@ -1,9 +1,9 @@
 CBus *cbus_init(qemu_irq dat)

 {
+
+    CBusPriv *s = (CBusPriv *) g_malloc0(sizeof(*s));
+

     s->dat_out = dat;

CBus *cbus_init(qemu_irq dat)

{

    CBusPriv *s = (CBusPriv *) g_malloc0(sizeof(*s));

    s->dat_out = dat;

    s->cbus.clk = qemu_allocate_irqs(cbus_clk, s, 1)[0];

    s->cbus.dat = qemu_allocate_irqs(cbus_dat, s, 1)[0];

    s->cbus.sel = qemu_allocate_irqs(cbus_sel, s, 1)[0];

    s->sel = 1;

    s->clk = 0;

    s->dat = 0;

    return &s->cbus;

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 int qemu_add_balloon_handler(QEMUBalloonEvent *event_func,

+                             QEMUBalloonStatus *stat_func, void *opaque)

 {

int qemu_add_balloon_handler(QEMUBalloonEvent *event_func,

                             QEMUBalloonStatus *stat_func, void *opaque)

{

    if (balloon_event_fn || balloon_stat_fn || balloon_opaque) {

        /* We're already registered one balloon handler.  How many can

         * a guest really have?

         */

        error_report("Another balloon device already registered");

        return -1;

    }

    balloon_event_fn = event_func;

    balloon_stat_fn = stat_func;

    balloon_opaque = opaque;

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
 void replay_shutdown_request(void)

+{
+
+    if (replay_mode == REPLAY_MODE_RECORD) {

         replay_mutex_lock();

void replay_shutdown_request(void)

{

    if (replay_mode == REPLAY_MODE_RECORD) {

        replay_mutex_lock();

        replay_put_event(EVENT_SHUTDOWN);

        replay_mutex_unlock();

    }

}


--- a/source.c
+++ b/source.c
@@ -2,11 +2,11 @@

                                int32_t stride,

+                               int32_t height,
+
+                               int32_t log2_denom,
+
+                               int32_t src_weight,

                                int32_t offset_in)

static void avc_wgt_4width_msa(uint8_t *data,

                               int32_t stride,

                               int32_t height,

                               int32_t log2_denom,

                               int32_t src_weight,

                               int32_t offset_in)

{

    if (2 == height) {

        avc_wgt_4x2_msa(data, stride, log2_denom, src_weight, offset_in);

    } else {

        avc_wgt_4x4multiple_msa(data, stride, height, log2_denom,

                                src_weight, offset_in);

    }

}


--- a/source.c
+++ b/source.c
@@ -27,11 +27,11 @@
          *

          * _ADR object that is used to supply OSPM with unique address
+
+         * of the NVDIMM device. This is done by returning the NFIT Device
+
+         * handle that is used to identify the associated entries in ACPI
+
          * table NFIT or _FIT.

          */

static void nvdimm_build_nvdimm_devices(GSList *device_list, Aml *root_dev)

{

    for (; device_list; device_list = device_list->next) {

        DeviceState *dev = device_list->data;

        int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP,

                                           NULL);

        uint32_t handle = nvdimm_slot_to_handle(slot);

        Aml *nvdimm_dev;

        nvdimm_dev = aml_device("NV%02X", slot);

        /*

         * ACPI 6.0: 9.20 NVDIMM Devices:

         *

         * _ADR object that is used to supply OSPM with unique address

         * of the NVDIMM device. This is done by returning the NFIT Device

         * handle that is used to identify the associated entries in ACPI

         * table NFIT or _FIT.

         */

        aml_append(nvdimm_dev, aml_name_decl("_ADR", aml_int(handle)));

        nvdimm_build_device_dsm(nvdimm_dev);

        aml_append(root_dev, nvdimm_dev);

    }

}


--- a/source.c
+++ b/source.c
@@ -30,11 +30,11 @@

     note.prstatus.pr_reg.regs[16] = cpu_to_dump32(s, cpsr_read(env));

+
+
+    ret = f(&note, ARM_PRSTATUS_NOTE_SIZE, s);
+
+    if (ret < 0) {

         return -1;

int arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,

                             int cpuid, void *opaque)

{

    struct arm_note note;

    CPUARMState *env = &ARM_CPU(cs)->env;

    DumpState *s = opaque;

    int ret, i;

    arm_note_init(&note, s, "CORE", 5, NT_PRSTATUS, sizeof(note.prstatus));

    note.prstatus.pr_pid = cpu_to_dump32(s, cpuid);

    for (i = 0; i < 16; ++i) {

        note.prstatus.pr_reg.regs[i] = cpu_to_dump32(s, env->regs[i]);

    }

    note.prstatus.pr_reg.regs[16] = cpu_to_dump32(s, cpsr_read(env));

    ret = f(&note, ARM_PRSTATUS_NOTE_SIZE, s);

    if (ret < 0) {

        return -1;

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,9 +1,9 @@
 static void virtio_mmio_device_plugged(DeviceState *opaque)

 {
+
+    VirtIOMMIOProxy *proxy = VIRTIO_MMIO(opaque);
+

     proxy->host_features |= (0x1 << VIRTIO_F_NOTIFY_ON_EMPTY);

static void virtio_mmio_device_plugged(DeviceState *opaque)

{

    VirtIOMMIOProxy *proxy = VIRTIO_MMIO(opaque);

    proxy->host_features |= (0x1 << VIRTIO_F_NOTIFY_ON_EMPTY);

    proxy->host_features = virtio_bus_get_vdev_features(&proxy->bus,

                                                        proxy->host_features);

}


--- a/source.c
+++ b/source.c
@@ -3,7 +3,7 @@
 {

     QemuOpts *opts;
+

     if (!qemu_chr_new("debugcon", devname, NULL)) {

static int debugcon_parse(const char *devname)

{

    QemuOpts *opts;

    if (!qemu_chr_new("debugcon", devname, NULL)) {

        exit(1);

    }

    opts = qemu_opts_create(qemu_find_opts("device"), "debugcon", 1);

    if (!opts) {

        fprintf(stderr, "qemu: already have a debugcon device\n");

        exit(1);

    }

    qemu_opt_set(opts, "driver", "isa-debugcon");

    qemu_opt_set(opts, "chardev", "debugcon");

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -51,11 +51,11 @@
 			if (optlen != TCPOLEN_MAXSEG)

 				continue;
+
+			if (!(ti->ti_flags & TH_SYN))
+
+				continue;
+
 			memcpy((char *) &mss, (char *) cp + 2, sizeof(mss));

 			NTOHS(mss);

tcp_dooptions(struct tcpcb *tp, u_char *cp, int cnt, struct tcpiphdr *ti)

{

	uint16_t mss;

	int opt, optlen;

	DEBUG_CALL("tcp_dooptions");

	DEBUG_ARGS((dfd," tp = %lx  cnt=%i \n", (long )tp, cnt));

	for (; cnt > 0; cnt -= optlen, cp += optlen) {

		opt = cp[0];

		if (opt == TCPOPT_EOL)

			break;

		if (opt == TCPOPT_NOP)

			optlen = 1;

		else {

			optlen = cp[1];

			if (optlen <= 0)

				break;

		}

		switch (opt) {

		default:

			continue;

		case TCPOPT_MAXSEG:

			if (optlen != TCPOLEN_MAXSEG)

				continue;

			if (!(ti->ti_flags & TH_SYN))

				continue;

			memcpy((char *) &mss, (char *) cp + 2, sizeof(mss));

			NTOHS(mss);

			(void) tcp_mss(tp, mss);	/* sets t_maxseg */

			break;

		}

	}

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
 static void gen_dcbi(DisasContext *ctx)
+
+{
+
+#if defined(CONFIG_USER_ONLY)

     gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);

@@ -13,7 +13,7 @@
     if (unlikely(ctx->pr)) {

         gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
+
         return;

     }

static void gen_dcbi(DisasContext *ctx)

{

#if defined(CONFIG_USER_ONLY)

    gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);

#else

    TCGv EA, val;

    if (unlikely(ctx->pr)) {

        gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);

        return;

    }

    EA = tcg_temp_new();

    gen_set_access_type(ctx, ACCESS_CACHE);

    gen_addr_reg_index(ctx, EA);

    val = tcg_temp_new();

    /* XXX: specification says this should be treated as a store by the MMU */

    gen_qemu_ld8u(ctx, val, EA);

    gen_qemu_st8(ctx, val, EA);

    tcg_temp_free(val);

    tcg_temp_free(EA);

#endif

}


--- a/source.c
+++ b/source.c
@@ -1,5 +1,5 @@
 static void init_excp_620 (CPUPPCState *env)
+
 {

 #if !defined(CONFIG_USER_ONLY)
@@ -15,7 +15,7 @@
     env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;

     env->excp_vectors[POWERPC_EXCP_ALIGN]    = 0x00000600;
+
     env->excp_vectors[POWERPC_EXCP_PROGRAM]  = 0x00000700;

     env->excp_vectors[POWERPC_EXCP_FPU]      = 0x00000800;

static void init_excp_620 (CPUPPCState *env)

{

#if !defined(CONFIG_USER_ONLY)

    env->excp_vectors[POWERPC_EXCP_RESET]    = 0x00000100;

    env->excp_vectors[POWERPC_EXCP_MCHECK]   = 0x00000200;

    env->excp_vectors[POWERPC_EXCP_DSI]      = 0x00000300;

    env->excp_vectors[POWERPC_EXCP_ISI]      = 0x00000400;

    env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;

    env->excp_vectors[POWERPC_EXCP_ALIGN]    = 0x00000600;

    env->excp_vectors[POWERPC_EXCP_PROGRAM]  = 0x00000700;

    env->excp_vectors[POWERPC_EXCP_FPU]      = 0x00000800;

    env->excp_vectors[POWERPC_EXCP_DECR]     = 0x00000900;

    env->excp_vectors[POWERPC_EXCP_SYSCALL]  = 0x00000C00;

    env->excp_vectors[POWERPC_EXCP_TRACE]    = 0x00000D00;

    env->excp_vectors[POWERPC_EXCP_FPA]      = 0x00000E00;

    env->excp_vectors[POWERPC_EXCP_PERFM]    = 0x00000F00;

    env->excp_vectors[POWERPC_EXCP_IABR]     = 0x00001300;

    env->excp_vectors[POWERPC_EXCP_SMI]      = 0x00001400;

    /* Hardware reset vector */

    env->hreset_vector = 0x0000000000000100ULL; /* ? */

#endif

}


--- a/source.c
+++ b/source.c
@@ -43,10 +43,10 @@
                 goto fail;
             av_set_pts_info(st, 64, framerate.den, framerate.num);
             st->codec->width  = width;
+            st->codec->height = height;
+            st->codec->pix_fmt = pix_fmt;
+fail:
+            return ret;
+        default:
             return -1;
     return 0;

int ff_raw_read_header(AVFormatContext *s, AVFormatParameters *ap)
{
    AVStream *st;
    enum CodecID id;
    st = avformat_new_stream(s, NULL);
    if (!st)
        return AVERROR(ENOMEM);
        id = s->iformat->value;
        if (id == CODEC_ID_RAWVIDEO) {
            st->codec->codec_type = AVMEDIA_TYPE_VIDEO;
        } else {
            st->codec->codec_type = AVMEDIA_TYPE_AUDIO;
        st->codec->codec_id = id;
        switch(st->codec->codec_type) {
        case AVMEDIA_TYPE_AUDIO: {
            RawAudioDemuxerContext *s1 = s->priv_data;
            st->codec->channels = 1;
            if (id == CODEC_ID_ADPCM_G722)
                st->codec->sample_rate = 16000;
            if (s1 && s1->sample_rate)
                st->codec->sample_rate = s1->sample_rate;
            if (s1 && s1->channels)
                st->codec->channels    = s1->channels;
            st->codec->bits_per_coded_sample = av_get_bits_per_sample(st->codec->codec_id);
            assert(st->codec->bits_per_coded_sample > 0);
            st->codec->block_align = st->codec->bits_per_coded_sample*st->codec->channels/8;
            av_set_pts_info(st, 64, 1, st->codec->sample_rate);
            break;
        case AVMEDIA_TYPE_VIDEO: {
            FFRawVideoDemuxerContext *s1 = s->priv_data;
            int width = 0, height = 0, ret = 0;
            enum PixelFormat pix_fmt;
            AVRational framerate;
            if (s1->video_size && (ret = av_parse_video_size(&width, &height, s1->video_size)) < 0) {
                av_log(s, AV_LOG_ERROR, "Couldn't parse video size.\n");
                goto fail;
            if ((pix_fmt = av_get_pix_fmt(s1->pixel_format)) == PIX_FMT_NONE) {
                av_log(s, AV_LOG_ERROR, "No such pixel format: %s.\n", s1->pixel_format);
                ret = AVERROR(EINVAL);
                goto fail;
            if ((ret = av_parse_video_rate(&framerate, s1->framerate)) < 0) {
                av_log(s, AV_LOG_ERROR, "Could not parse framerate: %s.\n", s1->framerate);
                goto fail;
            av_set_pts_info(st, 64, framerate.den, framerate.num);
            st->codec->width  = width;
            st->codec->height = height;
            st->codec->pix_fmt = pix_fmt;
fail:
            return ret;
        default:
            return -1;
    return 0;


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
 static int coroutine_fn raw_co_pwrite_zeroes(BlockDriverState *bs,

                                              int64_t offset, int count,
+
+                                             BdrvRequestFlags flags)

 {

static int coroutine_fn raw_co_pwrite_zeroes(BlockDriverState *bs,

                                             int64_t offset, int count,

                                             BdrvRequestFlags flags)

{

    return bdrv_co_pwrite_zeroes(bs->file->bs, offset, count, flags);

}


--- a/source.c
+++ b/source.c
@@ -3,7 +3,7 @@
 {

     VirtIOBlock *s = VIRTIO_BLK(vdev);
+
     VirtIOBlockReq *req = s->rq;

static void virtio_blk_save_device(VirtIODevice *vdev, QEMUFile *f)

{

    VirtIOBlock *s = VIRTIO_BLK(vdev);

    VirtIOBlockReq *req = s->rq;

    while (req) {

        qemu_put_sbyte(f, 1);

        qemu_put_buffer(f, (unsigned char *)req->elem,

                        sizeof(VirtQueueElement));

        req = req->next;

    }

    qemu_put_sbyte(f, 0);

}


--- a/source.c
+++ b/source.c
@@ -17,11 +17,11 @@
         break;

+
+    case SOCKET_ADDRESS_KIND_UNIX:
+
+        fd = unix_connect_saddr(addr->u.q_unix, errp, callback, opaque);
+
         break;

int socket_connect(SocketAddress *addr, Error **errp,

                   NonBlockingConnectHandler *callback, void *opaque)

{

    int fd;

    switch (addr->type) {

    case SOCKET_ADDRESS_KIND_INET:

        fd = inet_connect_saddr(addr->u.inet, errp, callback, opaque);

        break;

    case SOCKET_ADDRESS_KIND_UNIX:

        fd = unix_connect_saddr(addr->u.q_unix, errp, callback, opaque);

        break;

    case SOCKET_ADDRESS_KIND_FD:

        fd = monitor_get_fd(cur_mon, addr->u.fd->str, errp);

        if (fd >= 0 && callback) {

            qemu_set_nonblock(fd);

            callback(fd, NULL, opaque);

        }

        break;

    default:

        abort();

    }

    return fd;

}


--- a/source.c
+++ b/source.c
@@ -1,14 +1,14 @@
 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,

                                 ram_addr_t above_4g_mem_size)
+
+{
+
+    PcGuestInfoState *guest_info_state = g_malloc0(sizeof *guest_info_state);

+    PcGuestInfo *guest_info = &guest_info_state->info;
+
+

     guest_info->pci_info.w32.end = IO_APIC_DEFAULT_ADDRESS;

PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,

                                ram_addr_t above_4g_mem_size)

{

    PcGuestInfoState *guest_info_state = g_malloc0(sizeof *guest_info_state);

    PcGuestInfo *guest_info = &guest_info_state->info;

    guest_info->pci_info.w32.end = IO_APIC_DEFAULT_ADDRESS;

    if (sizeof(hwaddr) == 4) {

        guest_info->pci_info.w64.begin = 0;

        guest_info->pci_info.w64.end = 0;

    } else {

        /*

         * BIOS does not set MTRR entries for the 64 bit window, so no need to

         * align address to power of two.  Align address at 1G, this makes sure

         * it can be exactly covered with a PAT entry even when using huge

         * pages.

         */

        guest_info->pci_info.w64.begin =

            ROUND_UP((0x1ULL << 32) + above_4g_mem_size, 0x1ULL << 30);

        guest_info->pci_info.w64.end = guest_info->pci_info.w64.begin +

            (0x1ULL << 62);

        assert(guest_info->pci_info.w64.begin <= guest_info->pci_info.w64.end);

    }

    guest_info_state->machine_done.notify = pc_guest_info_machine_done;

    qemu_add_machine_init_done_notifier(&guest_info_state->machine_done);

    return guest_info;

}


--- a/source.c
+++ b/source.c
@@ -3,7 +3,7 @@
 {

     if ((credp->fc_uid == -1 && credp->fc_gid == -1) ||
+
             (fs_ctx->fs_sm == SM_PASSTHROUGH)) {

         return lchown(rpath(fs_ctx, path), credp->fc_uid, credp->fc_gid);

static int local_chown(FsContext *fs_ctx, const char *path, FsCred *credp)

{

    if ((credp->fc_uid == -1 && credp->fc_gid == -1) ||

            (fs_ctx->fs_sm == SM_PASSTHROUGH)) {

        return lchown(rpath(fs_ctx, path), credp->fc_uid, credp->fc_gid);

    } else if (fs_ctx->fs_sm == SM_MAPPED) {

        return local_set_xattr(rpath(fs_ctx, path), credp);

    } else if (fs_ctx->fs_sm == SM_PASSTHROUGH) {

        return lchown(rpath(fs_ctx, path), credp->fc_uid, credp->fc_gid);

    }

    return -1;

}


--- a/source.c
+++ b/source.c
@@ -1,10 +1,10 @@
 static void virtio_blk_update_config(VirtIODevice *vdev, uint8_t *config)

+{
+
+    VirtIOBlock *s = to_virtio_blk(vdev);
+
+    struct virtio_blk_config blkcfg;

     uint64_t capacity;

static void virtio_blk_update_config(VirtIODevice *vdev, uint8_t *config)

{

    VirtIOBlock *s = to_virtio_blk(vdev);

    struct virtio_blk_config blkcfg;

    uint64_t capacity;

    int cylinders, heads, secs;

    bdrv_get_geometry(s->bs, &capacity);

    bdrv_get_geometry_hint(s->bs, &cylinders, &heads, &secs);

    stq_raw(&blkcfg.capacity, capacity);

    stl_raw(&blkcfg.seg_max, 128 - 2);

    stw_raw(&blkcfg.cylinders, cylinders);

    blkcfg.heads = heads;

    blkcfg.sectors = secs;

    memcpy(config, &blkcfg, sizeof(blkcfg));

}


--- a/source.c
+++ b/source.c
@@ -3,11 +3,11 @@
 {

     uint16_t retval;
+
+    MACIOIDEState *d = opaque;
+
+
+
     addr = (addr & 0xFFF) >> 4;

     if (addr == 0) {

static uint32_t pmac_ide_readw (void *opaque,target_phys_addr_t addr)

{

    uint16_t retval;

    MACIOIDEState *d = opaque;

    addr = (addr & 0xFFF) >> 4;

    if (addr == 0) {

        retval = ide_data_readw(&d->bus, 0);

    } else {

        retval = 0xFFFF;

    }

    retval = bswap16(retval);

    return retval;

}


--- a/source.c
+++ b/source.c
@@ -12,11 +12,11 @@

     if (write_sync(csock, &magic, sizeof(magic)) != sizeof(magic)) {

+        LOG("write failed (rep magic)");
+
+        return -EINVAL;
+
+    }

     opt = cpu_to_be32(opt);

static int nbd_send_rep(int csock, uint32_t type, uint32_t opt)

{

    uint64_t magic;

    uint32_t len;

    magic = cpu_to_be64(NBD_REP_MAGIC);

    if (write_sync(csock, &magic, sizeof(magic)) != sizeof(magic)) {

        LOG("write failed (rep magic)");

        return -EINVAL;

    }

    opt = cpu_to_be32(opt);

    if (write_sync(csock, &opt, sizeof(opt)) != sizeof(opt)) {

        LOG("write failed (rep opt)");

        return -EINVAL;

    }

    type = cpu_to_be32(type);

    if (write_sync(csock, &type, sizeof(type)) != sizeof(type)) {

        LOG("write failed (rep type)");

        return -EINVAL;

    }

    len = cpu_to_be32(0);

    if (write_sync(csock, &len, sizeof(len)) != sizeof(len)) {

        LOG("write failed (rep data length)");

        return -EINVAL;

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,9 +1,9 @@
 int bdrv_all_find_snapshot(const char *name, BlockDriverState **first_bad_bs)

 {
+
+    QEMUSnapshotInfo sn;
+
     int err = 0;

     BlockDriverState *bs;

int bdrv_all_find_snapshot(const char *name, BlockDriverState **first_bad_bs)

{

    QEMUSnapshotInfo sn;

    int err = 0;

    BlockDriverState *bs;

    BdrvNextIterator *it = NULL;

    while (err == 0 && (it = bdrv_next(it, &bs))) {

        AioContext *ctx = bdrv_get_aio_context(bs);

        aio_context_acquire(ctx);

        if (bdrv_can_snapshot(bs)) {

            err = bdrv_snapshot_find(bs, &sn, name);

        }

        aio_context_release(ctx);

    }

    *first_bad_bs = bs;

    return err;

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
+static void mmio_interface_realize(DeviceState *dev, Error **errp)
+
+{
+
+    MMIOInterface *s = MMIO_INTERFACE(dev);

static void mmio_interface_realize(DeviceState *dev, Error **errp)

{

    MMIOInterface *s = MMIO_INTERFACE(dev);

    DPRINTF("realize from 0x%" PRIX64 " to 0x%" PRIX64 " map host pointer"

            " %p\n", s->start, s->end, s->host_ptr);

    if (!s->host_ptr) {

        error_setg(errp, "host_ptr property must be set");

    }

    if (!s->subregion) {

        error_setg(errp, "subregion property must be set");

    }

    memory_region_init_ram_ptr(&s->ram_mem, OBJECT(s), "ram",

                               s->end - s->start + 1, s->host_ptr);

    memory_region_set_readonly(&s->ram_mem, s->ro);

    memory_region_add_subregion(s->subregion, s->start, &s->ram_mem);

}


static void dss_sp_scale_vector(int32_t *vec, int bits, int size)

{

    int i;

    if (bits < 0)

        for (i = 0; i < size; i++)

            vec[i] = vec[i] >> -bits;

    else

        for (i = 0; i < size; i++)

            vec[i] = vec[i] << bits;

}


void ppc_slb_invalidate_all (CPUPPCState *env)

{

    /* XXX: TODO */

    tlb_flush(env, 1);

}


--- a/source.c
+++ b/source.c
@@ -22,11 +22,11 @@

         if (!av_strncasecmp(name, names, len))

+            return 1;
+
+        names = p + 1;
+
+    }

     return !av_strcasecmp(name, names);

static int match_format(const char *name, const char *names)

{

    const char *p;

    int len, namelen;

    if (!name || !names)

        return 0;

    namelen = strlen(name);

    while ((p = strchr(names, ','))) {

        len = FFMAX(p - names, namelen);

        if (!av_strncasecmp(name, names, len))

            return 1;

        names = p + 1;

    }

    return !av_strcasecmp(name, names);

}


--- a/source.c
+++ b/source.c
@@ -1,5 +1,5 @@
 void error_propagate(Error **dst_err, Error *local_err)
+
 {

     if (dst_err) {

void error_propagate(Error **dst_err, Error *local_err)

{

    if (dst_err) {

        *dst_err = local_err;

    } else if (local_err) {

        error_free(local_err);

    }

}


--- a/source.c
+++ b/source.c
@@ -5,9 +5,9 @@
     if (ret < 0) {

         error_report("Failed flush request: %s\n", strerror(-ret));
+
+        exit(EXIT_FAILURE);
+
     }

 }

static void bench_undrained_flush_cb(void *opaque, int ret)

{

    if (ret < 0) {

        error_report("Failed flush request: %s\n", strerror(-ret));

        exit(EXIT_FAILURE);

    }

}


--- a/source.c
+++ b/source.c
@@ -30,11 +30,11 @@

 	put_packetheader(nut, bc, 64);

+	put_v(bc, s->streams[i]->id);
+
+	put_v(bc, ...);
+
+	put_be32(bc, 0); /* FIXME: checksum */

         update_packetheader(nut, bc, 0);

static int nut_write_trailer(AVFormatContext *s)

{

    NUTContext *nut = s->priv_data;

    ByteIOContext *bc = &s->pb;

    update_packetheader(nut, bc, 0);

#if 0

    int i;

    /* WRITE INDEX */

    for (i = 0; s->nb_streams; i++)

    {

	put_be64(bc, INDEX_STARTCODE);

	put_packetheader(nut, bc, 64);

	put_v(bc, s->streams[i]->id);

	put_v(bc, ...);

	put_be32(bc, 0); /* FIXME: checksum */

        update_packetheader(nut, bc, 0);

    }

#endif

    put_flush_packet(bc);

    av_freep(&nut->stream);

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -7,9 +7,9 @@
     /* cancelling the I/O request causes KQEMU to finish executing the

        current block and successfully returning. */
+
+    CancelIo(kqemu_fd);
+
 #endif

 }

void kqemu_cpu_interrupt(CPUState *env)

{

#if defined(_WIN32)

    /* cancelling the I/O request causes KQEMU to finish executing the

       current block and successfully returning. */

    CancelIo(kqemu_fd);

#endif

}


static void vnc_write_u8(VncState *vs, uint8_t value)

{

    vnc_write(vs, (char *)&value, 1);

}


--- a/source.c
+++ b/source.c
@@ -14,7 +14,7 @@

     int code_gen_size;

+

     phys_pc = get_phys_addr_code(env, pc);

static void tb_gen_code(CPUState *env,

                        target_ulong pc, target_ulong cs_base, int flags,

                        int cflags)

{

    TranslationBlock *tb;

    uint8_t *tc_ptr;

    target_ulong phys_pc, phys_page2, virt_page2;

    int code_gen_size;

    phys_pc = get_phys_addr_code(env, pc);

    tb = tb_alloc(pc);

    if (!tb) {

        /* flush must be done */

        tb_flush(env);

        /* cannot fail at this point */

        tb = tb_alloc(pc);

    }

    tc_ptr = code_gen_ptr;

    tb->tc_ptr = tc_ptr;

    tb->cs_base = cs_base;

    tb->flags = flags;

    tb->cflags = cflags;

    cpu_gen_code(env, tb, CODE_GEN_MAX_SIZE, &code_gen_size);

    code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1));

    /* check next page if needed */

    virt_page2 = (pc + tb->size - 1) & TARGET_PAGE_MASK;

    phys_page2 = -1;

    if ((pc & TARGET_PAGE_MASK) != virt_page2) {

        phys_page2 = get_phys_addr_code(env, virt_page2);

    }

    tb_link_phys(tb, phys_pc, phys_page2);

}


void ff_mpc_dequantize_and_synth(MPCContext * c, int maxband, void *data, int channels)

{

    int i, j, ch;

    Band *bands = c->bands;

    int off;

    float mul;

    /* dequantize */

    memset(c->sb_samples, 0, sizeof(c->sb_samples));

    off = 0;

    for(i = 0; i <= maxband; i++, off += SAMPLES_PER_BAND){

        for(ch = 0; ch < 2; ch++){

            if(bands[i].res[ch]){

                j = 0;

                mul = mpc_CC[bands[i].res[ch]] * mpc_SCF[bands[i].scf_idx[ch][0] & 0xFF];

                for(; j < 12; j++)

                    c->sb_samples[ch][j][i] = mul * c->Q[ch][j + off];

                mul = mpc_CC[bands[i].res[ch]] * mpc_SCF[bands[i].scf_idx[ch][1] & 0xFF];

                for(; j < 24; j++)

                    c->sb_samples[ch][j][i] = mul * c->Q[ch][j + off];

                mul = mpc_CC[bands[i].res[ch]] * mpc_SCF[bands[i].scf_idx[ch][2] & 0xFF];

                for(; j < 36; j++)

                    c->sb_samples[ch][j][i] = mul * c->Q[ch][j + off];

            }

        }

        if(bands[i].msf){

            int t1, t2;

            for(j = 0; j < SAMPLES_PER_BAND; j++){

                t1 = c->sb_samples[0][j][i];

                t2 = c->sb_samples[1][j][i];

                c->sb_samples[0][j][i] = t1 + t2;

                c->sb_samples[1][j][i] = t1 - t2;

            }

        }

    }

    mpc_synth(c, data, channels);

}


--- a/source.c
+++ b/source.c
@@ -10,7 +10,7 @@

     const uint8_t * ptr = src + byte*2;

+    int ptr_len = src_len - 1 - byte*2;

     uint8_t val = ival;

static int xan_huffman_decode(uint8_t *dest, int dest_len,

                              const uint8_t *src, int src_len)

{

    uint8_t byte = *src++;

    uint8_t ival = byte + 0x16;

    const uint8_t * ptr = src + byte*2;

    int ptr_len = src_len - 1 - byte*2;

    uint8_t val = ival;

    uint8_t *dest_end = dest + dest_len;

    uint8_t *dest_start = dest;

    int ret;

    GetBitContext gb;

    if ((ret = init_get_bits8(&gb, ptr, ptr_len)) < 0)

        return ret;

    while (val != 0x16) {

        unsigned idx = val - 0x17 + get_bits1(&gb) * byte;

        if (idx >= 2 * byte)

            return AVERROR_INVALIDDATA;

        val = src[idx];

        if (val < 0x16) {

            if (dest >= dest_end)

                return dest_len;

            *dest++ = val;

            val = ival;

        }

    }

    return dest - dest_start;

}


--- a/source.c
+++ b/source.c
@@ -2,10 +2,10 @@

                              BlockDriverState **fds)

+{
+
+    fdctrl_t *fdctrl;
+

     fdctrl = fdctrl_init(irq, 0, 1, io_base, fds);

fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base,

                             BlockDriverState **fds)

{

    fdctrl_t *fdctrl;

    fdctrl = fdctrl_init(irq, 0, 1, io_base, fds);

    fdctrl->sun4m = 1;

    return fdctrl;

}


--- a/source.c
+++ b/source.c
@@ -4,4 +4,4 @@

     return float32_add(a, b, &env->ucf64.fp_status);

+}

float32 HELPER(ucf64_adds)(float32 a, float32 b, CPUUniCore32State *env)

{

    return float32_add(a, b, &env->ucf64.fp_status);

}


--- a/source.c
+++ b/source.c
@@ -11,11 +11,11 @@
     int ret;

+
+    cdsp->vector_fmul(cdst, v1, v2, LEN);
+
+    fdsp->vector_fmul(odst, v1, v2, LEN);
+

     if (ret = compare_floats(cdst, odst, LEN, FLT_EPSILON))

static int test_vector_fmul(AVFloatDSPContext *fdsp, AVFloatDSPContext *cdsp,

                            const float *v1, const float *v2)

{

    LOCAL_ALIGNED(32, float, cdst, [LEN]);

    LOCAL_ALIGNED(32, float, odst, [LEN]);

    int ret;

    cdsp->vector_fmul(cdst, v1, v2, LEN);

    fdsp->vector_fmul(odst, v1, v2, LEN);

    if (ret = compare_floats(cdst, odst, LEN, FLT_EPSILON))

        av_log(NULL, AV_LOG_ERROR, "vector_fmul failed\n");

    return ret;

}


--- a/source.c
+++ b/source.c
@@ -5,11 +5,11 @@
 {

     BDRVQcowState *s = bs->opaque;
+
+    int index_in_cluster, n;
+
+    uint64_t cluster_offset;
+

     qemu_co_mutex_lock(&s->lock);

static int64_t coroutine_fn qcow_co_get_block_status(BlockDriverState *bs,

        int64_t sector_num, int nb_sectors, int *pnum)

{

    BDRVQcowState *s = bs->opaque;

    int index_in_cluster, n;

    uint64_t cluster_offset;

    qemu_co_mutex_lock(&s->lock);

    cluster_offset = get_cluster_offset(bs, sector_num << 9, 0, 0, 0, 0);

    qemu_co_mutex_unlock(&s->lock);

    index_in_cluster = sector_num & (s->cluster_sectors - 1);

    n = s->cluster_sectors - index_in_cluster;

    if (n > nb_sectors)

        n = nb_sectors;

    *pnum = n;

    if (!cluster_offset) {

        return 0;

    }

    if ((cluster_offset & QCOW_OFLAG_COMPRESSED) || s->cipher) {

        return BDRV_BLOCK_DATA;

    }

    cluster_offset |= (index_in_cluster << BDRV_SECTOR_BITS);

    return BDRV_BLOCK_DATA | BDRV_BLOCK_OFFSET_VALID | cluster_offset;

}


--- a/source.c
+++ b/source.c
@@ -2,11 +2,11 @@

 {

+    VirtIOSerial *vser;
+
+
+
+    vser = VIRTIO_SERIAL(vdev);

static uint32_t get_features(VirtIODevice *vdev, uint32_t features)

{

    VirtIOSerial *vser;

    vser = VIRTIO_SERIAL(vdev);

    if (vser->bus.max_nr_ports > 1) {

        features |= (1 << VIRTIO_CONSOLE_F_MULTIPORT);

    }

    return features;

}


--- a/source.c
+++ b/source.c
@@ -1,10 +1,10 @@
 static void dec_store(DisasContext *dc)
 {
     TCGv t, *addr;
+    unsigned int size;
+    size = 1 << (dc->opcode & 3);
+    LOG_DIS("s%d%s\n", size, dc->type_b ? "i" : "");
+    t_sync_flags(dc);
     /* If we get a fault on a dslot, the jmpstate better be in sync.  */
     sync_jmpstate(dc);
     addr = compute_ldst_addr(dc, &t);

static void dec_store(DisasContext *dc)
{
    TCGv t, *addr;
    unsigned int size;
    size = 1 << (dc->opcode & 3);
    LOG_DIS("s%d%s\n", size, dc->type_b ? "i" : "");
    t_sync_flags(dc);
    /* If we get a fault on a dslot, the jmpstate better be in sync.  */
    sync_jmpstate(dc);
    addr = compute_ldst_addr(dc, &t);
    /* Verify alignment if needed.  */
    if ((dc->env->pvr.regs[2] & PVR2_UNALIGNED_EXC_MASK) && size > 1) {
        gen_helper_memalign(*addr, tcg_const_tl(dc->rd),
                            tcg_const_tl(1), tcg_const_tl(size - 1));
    gen_store(dc, *addr, cpu_R[dc->rd], size);
    if (addr == &t)
        tcg_temp_free(t);


--- a/source.c
+++ b/source.c
@@ -1,5 +1,5 @@
 HBitmap *hbitmap_alloc(uint64_t size, int granularity)
+
 {

     HBitmap *hb = g_malloc0(sizeof (struct HBitmap));
@@ -8,7 +8,7 @@

+    assert(granularity >= 0 && granularity < 64);

     size = (size + (1ULL << granularity) - 1) >> granularity;

HBitmap *hbitmap_alloc(uint64_t size, int granularity)

{

    HBitmap *hb = g_malloc0(sizeof (struct HBitmap));

    unsigned i;

    assert(granularity >= 0 && granularity < 64);

    size = (size + (1ULL << granularity) - 1) >> granularity;

    assert(size <= ((uint64_t)1 << HBITMAP_LOG_MAX_SIZE));

    hb->size = size;

    hb->granularity = granularity;

    for (i = HBITMAP_LEVELS; i-- > 0; ) {

        size = MAX((size + BITS_PER_LONG - 1) >> BITS_PER_LEVEL, 1);

        hb->levels[i] = g_malloc0(size * sizeof(unsigned long));

    }

    /* We necessarily have free bits in level 0 due to the definition

     * of HBITMAP_LEVELS, so use one for a sentinel.  This speeds up

     * hbitmap_iter_skip_words.

     */

    assert(size == 1);

    hb->levels[0][0] |= 1UL << (BITS_PER_LONG - 1);

    return hb;

}


--- a/source.c
+++ b/source.c
@@ -1,11 +1,11 @@
+int qemu_chr_open_msmouse(QemuOpts *opts, CharDriverState **_chr)

 {

     CharDriverState *chr;

+
+
     chr = g_malloc0(sizeof(CharDriverState));

     chr->chr_write = msmouse_chr_write;

int qemu_chr_open_msmouse(QemuOpts *opts, CharDriverState **_chr)

{

    CharDriverState *chr;

    chr = g_malloc0(sizeof(CharDriverState));

    chr->chr_write = msmouse_chr_write;

    chr->chr_close = msmouse_chr_close;

    qemu_add_mouse_event_handler(msmouse_event, chr, 0, "QEMU Microsoft Mouse");

    *_chr = chr;

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -21,11 +21,11 @@
         return AVERROR_OPTION_NOT_FOUND;

     if (o->type != type) {
+
+        av_log(obj, AV_LOG_ERROR,
+
+               "The value set by option '%s' is not a %s format", name, desc);
+
         return AVERROR(EINVAL);

     }

static int set_format(void *obj, const char *name, int fmt, int search_flags,

                      enum AVOptionType type, const char *desc, int nb_fmts)

{

    void *target_obj;

    const AVOption *o = av_opt_find2(obj, name, NULL, 0,

                                     search_flags, &target_obj);

    int min, max;

    const AVClass *class = *(AVClass **)obj;

    if (!o || !target_obj)

        return AVERROR_OPTION_NOT_FOUND;

    if (o->type != type) {

        av_log(obj, AV_LOG_ERROR,

               "The value set by option '%s' is not a %s format", name, desc);

        return AVERROR(EINVAL);

    }

#if LIBAVUTIL_VERSION_MAJOR < 54

    if (class->version && class->version < AV_VERSION_INT(52, 11, 100)) {

        min = -1;

        max = nb_fmts-1;

    } else

#endif

    {

        min = FFMIN(o->min, -1);

        max = FFMAX(o->max, nb_fmts-1);

    }

    if (fmt < min || fmt > max) {

        av_log(obj, AV_LOG_ERROR,

               "Value %d for parameter '%s' out of %s format range [%d - %d]\n",

               fmt, name, desc, min, max);

        return AVERROR(ERANGE);

    }

    *(int *)(((uint8_t *)target_obj) + o->offset) = fmt;

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -39,11 +39,11 @@
     case JSON_STRING:

         return parse_literal(ctxt);
+
+    case JSON_KEYWORD:
+
+        return parse_keyword(ctxt);
+
     default:

         parse_error(ctxt, token, "expecting value");

static QObject *parse_value(JSONParserContext *ctxt, va_list *ap)

{

    QObject *token;

    token = parser_context_peek_token(ctxt);

    if (token == NULL) {

        parse_error(ctxt, NULL, "premature EOI");

        return NULL;

    }

    switch (token_get_type(token)) {

    case JSON_LCURLY:

        return parse_object(ctxt, ap);

    case JSON_LSQUARE:

        return parse_array(ctxt, ap);

    case JSON_ESCAPE:

        return parse_escape(ctxt, ap);

    case JSON_INTEGER:

    case JSON_FLOAT:

    case JSON_STRING:

        return parse_literal(ctxt);

    case JSON_KEYWORD:

        return parse_keyword(ctxt);

    default:

        parse_error(ctxt, token, "expecting value");

        return NULL;

    }

}


--- a/source.c
+++ b/source.c
@@ -27,11 +27,11 @@
     } else {

         s->palette_video = 1;
+
+        avctx->pix_fmt = PIX_FMT_PAL8;
+
+    }
+

     dsputil_init(&s->dsp, avctx);

static int cinepak_decode_init(AVCodecContext *avctx)

{

    CinepakContext *s = avctx->priv_data;

    s->avctx = avctx;

    s->width = (avctx->width + 3) & ~3;

    s->height = (avctx->height + 3) & ~3;

    s->sega_film_skip_bytes = -1;  /* uninitialized state */

    // check for paletted data

    if ((avctx->palctrl == NULL) || (avctx->bits_per_sample == 40)) {

        s->palette_video = 0;

        avctx->pix_fmt = PIX_FMT_YUV420P;

    } else {

        s->palette_video = 1;

        avctx->pix_fmt = PIX_FMT_PAL8;

    }

    dsputil_init(&s->dsp, avctx);

    s->frame.data[0] = NULL;

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -10,11 +10,11 @@

     int ret;

+
+
+    *pnum = nb_sectors;
+
+    /* FIXME We can get errors here, but the bdrv_co_is_allocated interface

      * can't pass them on today */

static int coroutine_fn qcow2_co_is_allocated(BlockDriverState *bs,

        int64_t sector_num, int nb_sectors, int *pnum)

{

    BDRVQcowState *s = bs->opaque;

    uint64_t cluster_offset;

    int ret;

    *pnum = nb_sectors;

    /* FIXME We can get errors here, but the bdrv_co_is_allocated interface

     * can't pass them on today */

    qemu_co_mutex_lock(&s->lock);

    ret = qcow2_get_cluster_offset(bs, sector_num << 9, pnum, &cluster_offset);

    qemu_co_mutex_unlock(&s->lock);

    if (ret < 0) {

        *pnum = 0;

    }

    return (cluster_offset != 0);

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 static inline void store_cpu_offset(TCGv var, int offset)

+{

     tcg_gen_st_i32(var, cpu_env, offset);

static inline void store_cpu_offset(TCGv var, int offset)

{

    tcg_gen_st_i32(var, cpu_env, offset);

    dead_tmp(var);

}


--- a/source.c
+++ b/source.c
@@ -1,5 +1,5 @@
 static void set_bmc_global_enables(IPMIBmcSim *ibs,
+
                                    uint8_t *cmd, unsigned int cmd_len,

                                    uint8_t *rsp, unsigned int *rsp_len,

static void set_bmc_global_enables(IPMIBmcSim *ibs,

                                   uint8_t *cmd, unsigned int cmd_len,

                                   uint8_t *rsp, unsigned int *rsp_len,

                                   unsigned int max_rsp_len)

{

    IPMI_CHECK_CMD_LEN(3);

    set_global_enables(ibs, cmd[2]);

}


--- a/source.c
+++ b/source.c
@@ -6,8 +6,8 @@

+    env->cp15.c3 = value;
+
+    tlb_flush(CPU(cpu), 1); /* Flush TLB as domain not tracked in TLB */

 }

static void dacr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)

{

    ARMCPU *cpu = arm_env_get_cpu(env);

    env->cp15.c3 = value;

    tlb_flush(CPU(cpu), 1); /* Flush TLB as domain not tracked in TLB */

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 static uint32_t m5206_mbar_readb(void *opaque, target_phys_addr_t offset)

 {
+
     m5206_mbar_state *s = (m5206_mbar_state *)opaque;

     offset &= 0x3ff;

static uint32_t m5206_mbar_readb(void *opaque, target_phys_addr_t offset)

{

    m5206_mbar_state *s = (m5206_mbar_state *)opaque;

    offset &= 0x3ff;

    if (offset > 0x200) {

        hw_error("Bad MBAR read offset 0x%x", (int)offset);

    }

    if (m5206_mbar_width[offset >> 2] > 1) {

        uint16_t val;

        val = m5206_mbar_readw(opaque, offset & ~1);

        if ((offset & 1) == 0) {

            val >>= 8;

        }

        return val & 0xff;

    }

    return m5206_mbar_read(s, offset, 1);

}


--- a/source.c
+++ b/source.c
@@ -13,11 +13,11 @@
         qemu_get_be32s(f, &s->int_enabled[i]);

     for (i = 0; i < 2; i ++)
+
+        qemu_get_be32s(f, &s->int_pending[i]);
+
+    for (i = 0; i < 2; i ++)
+
         qemu_get_be32s(f, &s->is_fiq[i]);

     qemu_get_be32s(f, &s->int_idle);

static int pxa2xx_pic_load(QEMUFile *f, void *opaque, int version_id)

{

    PXA2xxPICState *s = (PXA2xxPICState *) opaque;

    int i;

    for (i = 0; i < 2; i ++)

        qemu_get_be32s(f, &s->int_enabled[i]);

    for (i = 0; i < 2; i ++)

        qemu_get_be32s(f, &s->int_pending[i]);

    for (i = 0; i < 2; i ++)

        qemu_get_be32s(f, &s->is_fiq[i]);

    qemu_get_be32s(f, &s->int_idle);

    for (i = 0; i < PXA2XX_PIC_SRCS; i ++)

        qemu_get_be32s(f, &s->priority[i]);

    pxa2xx_pic_update(opaque);

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -2,8 +2,8 @@

                               NBDRequest *request)

+{
+
     NBDClientSession *s = nbd_get_client_session(bs);

     int i = HANDLE_TO_INDEX(s, request->handle);

static void nbd_coroutine_end(BlockDriverState *bs,

                              NBDRequest *request)

{

    NBDClientSession *s = nbd_get_client_session(bs);

    int i = HANDLE_TO_INDEX(s, request->handle);

    s->recv_coroutine[i] = NULL;

    s->in_flight--;

    qemu_co_queue_next(&s->free_sema);

    /* Kick the read_reply_co to get the next reply.  */

    if (s->read_reply_co) {

        aio_co_wake(s->read_reply_co);

    }

}


--- a/source.c
+++ b/source.c
@@ -3,7 +3,7 @@
                                           int is_connected)

 {
+
     NetSocketState *s;

     s = qemu_mallocz(sizeof(NetSocketState));

static NetSocketState *net_socket_fd_init_stream(VLANState *vlan, int fd,

                                          int is_connected)

{

    NetSocketState *s;

    s = qemu_mallocz(sizeof(NetSocketState));

    if (!s)

        return NULL;

    s->fd = fd;

    s->vc = qemu_new_vlan_client(vlan,

                                 net_socket_receive, s);

    snprintf(s->vc->info_str, sizeof(s->vc->info_str),

             "socket: fd=%d", fd);

    if (is_connected) {

        net_socket_connect(s);

    } else {

        qemu_set_fd_handler(s->fd, NULL, net_socket_connect, s);

    }

    return s;

}


static inline void idct4col_put(uint8_t *dest, int line_size, const DCTELEM *col)

{

    int c0, c1, c2, c3, a0, a1, a2, a3;

    const uint8_t *cm = ff_cropTbl + MAX_NEG_CROP;

    a0 = col[8*0];

    a1 = col[8*2];

    a2 = col[8*4];

    a3 = col[8*6];

    c0 = ((a0 + a2) << (CN_SHIFT - 1)) + (1 << (C_SHIFT - 1));

    c2 = ((a0 - a2) << (CN_SHIFT - 1)) + (1 << (C_SHIFT - 1));

    c1 = a1 * C1 + a3 * C2;

    c3 = a1 * C2 - a3 * C1;

    dest[0] = cm[(c0 + c1) >> C_SHIFT];

    dest += line_size;

    dest[0] = cm[(c2 + c3) >> C_SHIFT];

    dest += line_size;

    dest[0] = cm[(c2 - c3) >> C_SHIFT];

    dest += line_size;

    dest[0] = cm[(c0 - c1) >> C_SHIFT];

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
+static int tpm_passthrough_unix_transfer(TPMPassthruState *tpm_pt,
+
+                                         const TPMLocality *locty_data)
+
 {

     return tpm_passthrough_unix_tx_bufs(tpm_pt,

static int tpm_passthrough_unix_transfer(TPMPassthruState *tpm_pt,

                                         const TPMLocality *locty_data)

{

    return tpm_passthrough_unix_tx_bufs(tpm_pt,

                                        locty_data->w_buffer.buffer,

                                        locty_data->w_offset,

                                        locty_data->r_buffer.buffer,

                                        locty_data->r_buffer.size);

}


--- a/source.c
+++ b/source.c
@@ -1,10 +1,10 @@
+static av_cold int ape_decode_close(AVCodecContext * avctx)
+
+{
+
+    APEContext *s = avctx->priv_data;
+
+    int i;

static av_cold int ape_decode_close(AVCodecContext * avctx)

{

    APEContext *s = avctx->priv_data;

    int i;

    for (i = 0; i < APE_FILTER_LEVELS; i++)

        av_freep(&s->filterbuf[i]);

    av_freep(&s->data);

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -14,11 +14,11 @@

     addr >>= 2;

+    switch (addr) {
+
+    case R_CTRL:
+
+        s->regs[addr] = value;

         break;

softusb_write(void *opaque, target_phys_addr_t addr, uint64_t value,

              unsigned size)

{

    MilkymistSoftUsbState *s = opaque;

    trace_milkymist_softusb_memory_write(addr, value);

    addr >>= 2;

    switch (addr) {

    case R_CTRL:

        s->regs[addr] = value;

        break;

    default:

        error_report("milkymist_softusb: write access to unknown register 0x"

                TARGET_FMT_plx, addr << 2);

        break;

    }

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 static int matroska_ebmlnum_uint(MatroskaDemuxContext *matroska,

                                  uint8_t *data, uint32_t size, uint64_t *num)
+
 {

     ByteIOContext pb;

static int matroska_ebmlnum_uint(MatroskaDemuxContext *matroska,

                                 uint8_t *data, uint32_t size, uint64_t *num)

{

    ByteIOContext pb;

    init_put_byte(&pb, data, size, 0, NULL, NULL, NULL, NULL);

    return ebml_read_num(matroska, &pb, 8, num);

}


--- a/source.c
+++ b/source.c
@@ -1,9 +1,9 @@
+static uint32_t ehci_mem_readl(void *ptr, target_phys_addr_t addr)

+{
+
+    EHCIState *s = ptr;
+
     uint32_t val;

static uint32_t ehci_mem_readl(void *ptr, target_phys_addr_t addr)

{

    EHCIState *s = ptr;

    uint32_t val;

    val = s->mmio[addr] | (s->mmio[addr+1] << 8) |

          (s->mmio[addr+2] << 16) | (s->mmio[addr+3] << 24);

    trace_usb_ehci_mmio_readl(addr, addr2str(addr), val);

    return val;

}


--- a/source.c
+++ b/source.c
@@ -1,4 +1,4 @@
+static void ready_residue(vorbis_enc_residue *rc, vorbis_enc_context *venc)

 {

static void ready_residue(vorbis_enc_residue *rc, vorbis_enc_context *venc)

{

    int i;

    assert(rc->type == 2);

    rc->maxes = av_mallocz(sizeof(float[2]) * rc->classifications);

    for (i = 0; i < rc->classifications; i++) {

        int j;

        vorbis_enc_codebook * cb;

        for (j = 0; j < 8; j++)

            if (rc->books[i][j] != -1)

                break;

        if (j == 8) // zero

            continue;

        cb = &venc->codebooks[rc->books[i][j]];

        assert(cb->ndimentions >= 2);

        assert(cb->lookup);

        for (j = 0; j < cb->nentries; j++) {

            float a;

            if (!cb->lens[j])

                continue;

            a = fabs(cb->dimentions[j * cb->ndimentions]);

            if (a > rc->maxes[i][0])

                rc->maxes[i][0] = a;

            a = fabs(cb->dimentions[j * cb->ndimentions + 1]);

            if (a > rc->maxes[i][1])

                rc->maxes[i][1] = a;

        }

    }

    // small bias

    for (i = 0; i < rc->classifications; i++) {

        rc->maxes[i][0] += 0.8;

        rc->maxes[i][1] += 0.8;

    }

}


--- a/source.c
+++ b/source.c
@@ -1,5 +1,5 @@
+static int qcow_check(BlockDriverState *bs)
+
 {

     return qcow2_check_refcounts(bs);

static int qcow_check(BlockDriverState *bs)

{

    return qcow2_check_refcounts(bs);

}


--- a/source.c
+++ b/source.c
@@ -7,11 +7,11 @@
     icp_pit_state *s = (icp_pit_state *)opaque;

     int n;
+
+
+
+    n = offset >> 8;
+
     if (n > 2) {

         hw_error("%s: Bad timer %d\n", __func__, n);

static void icp_pit_write(void *opaque, target_phys_addr_t offset,

                          uint64_t value, unsigned size)

{

    icp_pit_state *s = (icp_pit_state *)opaque;

    int n;

    n = offset >> 8;

    if (n > 2) {

        hw_error("%s: Bad timer %d\n", __func__, n);

    }

    arm_timer_write(s->timer[n], offset & 0xff, value);

}


--- a/source.c
+++ b/source.c
@@ -6,13 +6,13 @@

     int index = IS_USER(s);

+    s->is_mem = 1;

     tmp = tcg_temp_new_i32();

     switch(opsize) {

+    case OS_BYTE:

         if (sign)

static inline TCGv gen_load(DisasContext * s, int opsize, TCGv addr, int sign)

{

    TCGv tmp;

    int index = IS_USER(s);

    s->is_mem = 1;

    tmp = tcg_temp_new_i32();

    switch(opsize) {

    case OS_BYTE:

        if (sign)

            tcg_gen_qemu_ld8s(tmp, addr, index);

        else

            tcg_gen_qemu_ld8u(tmp, addr, index);

        break;

    case OS_WORD:

        if (sign)

            tcg_gen_qemu_ld16s(tmp, addr, index);

        else

            tcg_gen_qemu_ld16u(tmp, addr, index);

        break;

    case OS_LONG:

    case OS_SINGLE:

        tcg_gen_qemu_ld32u(tmp, addr, index);

        break;

    default:

        qemu_assert(0, "bad load size");

    }

    gen_throws_exception = gen_last_qop;

    return tmp;

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 void ff_put_h264_qpel8_mc10_msa(uint8_t *dst, const uint8_t *src,

+                                ptrdiff_t stride)
+
 {

     avc_luma_hz_qrt_8w_msa(src - 2, stride, dst, stride, 8, 0);

void ff_put_h264_qpel8_mc10_msa(uint8_t *dst, const uint8_t *src,

                                ptrdiff_t stride)

{

    avc_luma_hz_qrt_8w_msa(src - 2, stride, dst, stride, 8, 0);

}


--- a/source.c
+++ b/source.c
@@ -1,4 +1,4 @@
+static void format_line(void *ptr, int level, const char *fmt, va_list vl,

                         char part[3][512], int part_size, int *print_prefix, int type[2])

static void format_line(void *ptr, int level, const char *fmt, va_list vl,

                        char part[3][512], int part_size, int *print_prefix, int type[2])

{

    AVClass* avc = ptr ? *(AVClass **) ptr : NULL;

    part[0][0] = part[1][0] = part[2][0] = 0;

    if(type) type[0] = type[1] = AV_CLASS_CATEGORY_NA + 16;

    if (*print_prefix && avc) {

        if (avc->parent_log_context_offset) {

            AVClass** parent = *(AVClass ***) (((uint8_t *) ptr) +

                                   avc->parent_log_context_offset);

            if (parent && *parent) {

                snprintf(part[0], part_size, "[%s @ %p] ",

                         (*parent)->item_name(parent), parent);

                if(type) type[0] = get_category(((uint8_t *) ptr) + avc->parent_log_context_offset);

            }

        }

        snprintf(part[1], part_size, "[%s @ %p] ",

                 avc->item_name(ptr), ptr);

        if(type) type[1] = get_category(ptr);

    }

    vsnprintf(part[2], part_size, fmt, vl);

    *print_prefix = strlen(part[2]) && part[2][strlen(part[2]) - 1] == '\n';

}


--- a/source.c
+++ b/source.c
@@ -20,8 +20,8 @@

     put_v(bc, nut->written_packet_size); /* forward ptr */

+
+
+    return 0;
+
+}

static int put_packetheader(NUTContext *nut, ByteIOContext *bc, int max_size, int calculate_checksum)

{

    put_flush_packet(bc);

    nut->packet_start[2]= url_ftell(bc) - 8;

    nut->written_packet_size = max_size;

    if(calculate_checksum)

        init_checksum(bc, update_adler32, 0);

    /* packet header */

    put_v(bc, nut->written_packet_size); /* forward ptr */

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,9 +1,9 @@
 static target_ulong h_put_term_char(CPUState *env, sPAPREnvironment *spapr,
+
+                                    target_ulong opcode, target_ulong *args)
+
+{
+
     target_ulong reg = args[0];

     target_ulong len = args[1];

static target_ulong h_put_term_char(CPUState *env, sPAPREnvironment *spapr,

                                    target_ulong opcode, target_ulong *args)

{

    target_ulong reg = args[0];

    target_ulong len = args[1];

    target_ulong char0_7 = args[2];

    target_ulong char8_15 = args[3];

    VIOsPAPRDevice *sdev = spapr_vio_find_by_reg(spapr->vio_bus, reg);

    uint8_t buf[16];

    if (!sdev) {

        return H_PARAMETER;

    }

    if (len > 16) {

        return H_PARAMETER;

    }

    *((uint64_t *)buf) = cpu_to_be64(char0_7);

    *((uint64_t *)buf + 1) = cpu_to_be64(char8_15);

    vty_putchars(sdev, buf, len);

    return H_SUCCESS;

}


--- a/source.c
+++ b/source.c
@@ -33,11 +33,11 @@
      *   memory space enable bit is off

      * According to manual (805-1251.pdf).
+
+     *   the reset value should be zero unless the boot pin is tied high
+
+     *   (which is true) and thus it should be PCI_COMMAND_MEMORY.
+
      */

     pci_set_word(dev->config + PCI_COMMAND,

static int apb_pci_bridge_initfn(PCIDevice *dev)

{

    int rc;

    rc = pci_bridge_initfn(dev);

    if (rc < 0) {

        return rc;

    }

    pci_config_set_vendor_id(dev->config, PCI_VENDOR_ID_SUN);

    pci_config_set_device_id(dev->config, PCI_DEVICE_ID_SUN_SIMBA);

    /*

     * command register:

     * According to PCI bridge spec, after reset

     *   bus master bit is off

     *   memory space enable bit is off

     * According to manual (805-1251.pdf).

     *   the reset value should be zero unless the boot pin is tied high

     *   (which is true) and thus it should be PCI_COMMAND_MEMORY.

     */

    pci_set_word(dev->config + PCI_COMMAND,

                 PCI_COMMAND_MEMORY);

    pci_set_word(dev->config + PCI_STATUS,

                 PCI_STATUS_FAST_BACK | PCI_STATUS_66MHZ |

                 PCI_STATUS_DEVSEL_MEDIUM);

    pci_set_byte(dev->config + PCI_REVISION_ID, 0x11);

    return 0;

}


void ff_simple_idct248_put(uint8_t *dest, int line_size, DCTELEM *block)

{

    int i;

    DCTELEM *ptr;

    /* butterfly */

    ptr = block;

    for(i=0;i<4;i++) {

        BF(0);

        BF(1);

        BF(2);

        BF(3);

        BF(4);

        BF(5);

        BF(6);

        BF(7);

        ptr += 2 * 8;

    }

    /* IDCT8 on each line */

    for(i=0; i<8; i++) {

        idctRowCondDC_8(block + i*8);

    }

    /* IDCT4 and store */

    for(i=0;i<8;i++) {

        idct4col_put(dest + i, 2 * line_size, block + i);

        idct4col_put(dest + line_size + i, 2 * line_size, block + 8 + i);

    }

}


static void decodeplane32(uint32_t *dst, const uint8_t *const buf, int buf_size, int bps, int plane)

{

    GetBitContext gb;

    int i, b;

    init_get_bits(&gb, buf, buf_size * 8);

    for(i = 0; i < (buf_size * 8 + bps - 1) / bps; i++) {

        for (b = 0; b < bps; b++) {

            dst[ i*bps + b ] |= get_bits1(&gb) << plane;

        }

    }

}


--- a/source.c
+++ b/source.c
@@ -1,13 +1,13 @@
 static inline void RENAME(rgb24ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)
+
+{
+
 	int i;
+
+        assert(src1==src2);
+
+	for(i=0; i<width; i++)
+
 	{

 		int r= src1[6*i + 0] + src1[6*i + 3];

static inline void RENAME(rgb24ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width)

{

	int i;

        assert(src1==src2);

	for(i=0; i<width; i++)

	{

		int r= src1[6*i + 0] + src1[6*i + 3];

		int g= src1[6*i + 1] + src1[6*i + 4];

		int b= src1[6*i + 2] + src1[6*i + 5];

		dstU[i]= ((RU*r + GU*g + BU*b)>>(RGB2YUV_SHIFT+1)) + 128;

		dstV[i]= ((RV*r + GV*g + BV*b)>>(RGB2YUV_SHIFT+1)) + 128;

	}

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 int bdrv_in_use(BlockDriverState *bs)

 {
+
     return bs->in_use;

 }

int bdrv_in_use(BlockDriverState *bs)

{

    return bs->in_use;

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 static inline int32_t mipsdsp_add_i32(int32_t a, int32_t b, CPUMIPSState *env)

 {
+
     int32_t temp;

static inline int32_t mipsdsp_add_i32(int32_t a, int32_t b, CPUMIPSState *env)

{

    int32_t temp;

    temp = a + b;

    if (MIPSDSP_OVERFLOW(a, b, temp, 0x80000000)) {

        set_DSPControl_overflow_flag(1, 20, env);

    }

    return temp;

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 static void pci_device_reset(PCIDevice *dev)

+{

     int r;

static void pci_device_reset(PCIDevice *dev)

{

    int r;

    memset(dev->irq_state, 0, sizeof dev->irq_state);

    dev->config[PCI_COMMAND] &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY |

                                  PCI_COMMAND_MASTER);

    dev->config[PCI_CACHE_LINE_SIZE] = 0x0;

    dev->config[PCI_INTERRUPT_LINE] = 0x0;

    for (r = 0; r < PCI_NUM_REGIONS; ++r) {

        if (!dev->io_regions[r].size) {

            continue;

        }

        pci_set_long(dev->config + pci_bar(dev, r), dev->io_regions[r].type);

    }

    pci_update_mappings(dev);

}


--- a/source.c
+++ b/source.c
@@ -1,9 +1,9 @@
 void qemu_opts_print(QemuOpts *opts, const char *separator)
+
+{
+
+    QemuOpt *opt;
+
     QemuOptDesc *desc = opts->list->desc;

     const char *sep = "";

void qemu_opts_print(QemuOpts *opts, const char *separator)

{

    QemuOpt *opt;

    QemuOptDesc *desc = opts->list->desc;

    const char *sep = "";

    if (opts->id) {

        printf("id=%s", opts->id); /* passed id_wellformed -> no commas */

        sep = separator;

    }

    if (desc[0].name == NULL) {

        QTAILQ_FOREACH(opt, &opts->head, next) {

            printf("%s%s=", sep, opt->name);

            escaped_print(opt->str);

            sep = separator;

        }

        return;

    }

    for (; desc && desc->name; desc++) {

        const char *value;

        QemuOpt *opt = qemu_opt_find(opts, desc->name);

        value = opt ? opt->str : desc->def_value_str;

        if (!value) {

            continue;

        }

        if (desc->type == QEMU_OPT_STRING) {

            printf("%s%s=", sep, desc->name);

            escaped_print(value);

        } else if ((desc->type == QEMU_OPT_SIZE ||

                    desc->type == QEMU_OPT_NUMBER) && opt) {

            printf("%s%s=%" PRId64, sep, desc->name, opt->value.uint);

        } else {

            printf("%s%s=%s", sep, desc->name, value);

        }

        sep = separator;

    }

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
+static inline void check_hwrena(CPUMIPSState *env, int reg)

 {

+    if ((env->hflags & MIPS_HFLAG_CP0) || (env->CP0_HWREna & (1 << reg))) {

         return;

static inline void check_hwrena(CPUMIPSState *env, int reg)

{

    if ((env->hflags & MIPS_HFLAG_CP0) || (env->CP0_HWREna & (1 << reg))) {

        return;

    }

    do_raise_exception(env, EXCP_RI, GETPC());

}


--- a/source.c
+++ b/source.c
@@ -44,11 +44,11 @@

 	t_gen_mov_preg_TN(dc, dc->op2, t[0]);

+	if (dc->op2 == PR_CCS) {
+
+		cris_update_cc_op(dc, CC_OP_FLAGS, 4);
+
+		dc->flags_uptodate = 1;

 	}

static unsigned int dec_move_rp(DisasContext *dc)

{

	TCGv t[2];

	DIS(fprintf (logfile, "move $r%u, $p%u\n", dc->op1, dc->op2));

	cris_cc_mask(dc, 0);

	t[0] = tcg_temp_new(TCG_TYPE_TL);

	if (dc->op2 == PR_CCS) {

		cris_evaluate_flags(dc);

		t_gen_mov_TN_reg(t[0], dc->op1);

		if (dc->tb_flags & U_FLAG) {

			t[1] = tcg_temp_new(TCG_TYPE_TL);

			/* User space is not allowed to touch all flags.  */

			tcg_gen_andi_tl(t[0], t[0], 0x39f);

			tcg_gen_andi_tl(t[1], cpu_PR[PR_CCS], ~0x39f);

			tcg_gen_or_tl(t[0], t[1], t[0]);

			tcg_temp_free(t[1]);

		}

	}

	else

		t_gen_mov_TN_reg(t[0], dc->op1);

	t_gen_mov_preg_TN(dc, dc->op2, t[0]);

	if (dc->op2 == PR_CCS) {

		cris_update_cc_op(dc, CC_OP_FLAGS, 4);

		dc->flags_uptodate = 1;

	}

	tcg_temp_free(t[0]);

	return 2;

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 static void pxa2xx_rtc_swupdate(PXA2xxRTCState *s)
+
+{
+
     int64_t rt = qemu_get_clock(rt_clock);

     if (s->rtsr & (1 << 12))

static void pxa2xx_rtc_swupdate(PXA2xxRTCState *s)

{

    int64_t rt = qemu_get_clock(rt_clock);

    if (s->rtsr & (1 << 12))

        s->last_swcr += (rt - s->last_sw) / 10;

    s->last_sw = rt;

}


--- a/source.c
+++ b/source.c
@@ -38,11 +38,11 @@

         virtio_clear_feature(&features, VIRTIO_NET_F_GUEST_TSO6);

+        virtio_clear_feature(&features, VIRTIO_NET_F_GUEST_ECN);
+
+    }
+
+

     if (!peer_has_vnet_hdr(n) || !peer_has_ufo(n)) {

static uint64_t virtio_net_get_features(VirtIODevice *vdev, uint64_t features,

                                        Error **errp)

{

    VirtIONet *n = VIRTIO_NET(vdev);

    NetClientState *nc = qemu_get_queue(n->nic);

    /* Firstly sync all virtio-net possible supported features */

    features |= n->host_features;

    virtio_add_feature(&features, VIRTIO_NET_F_MAC);

    if (!peer_has_vnet_hdr(n)) {

        virtio_clear_feature(&features, VIRTIO_NET_F_CSUM);

        virtio_clear_feature(&features, VIRTIO_NET_F_HOST_TSO4);

        virtio_clear_feature(&features, VIRTIO_NET_F_HOST_TSO6);

        virtio_clear_feature(&features, VIRTIO_NET_F_HOST_ECN);

        virtio_clear_feature(&features, VIRTIO_NET_F_GUEST_CSUM);

        virtio_clear_feature(&features, VIRTIO_NET_F_GUEST_TSO4);

        virtio_clear_feature(&features, VIRTIO_NET_F_GUEST_TSO6);

        virtio_clear_feature(&features, VIRTIO_NET_F_GUEST_ECN);

    }

    if (!peer_has_vnet_hdr(n) || !peer_has_ufo(n)) {

        virtio_clear_feature(&features, VIRTIO_NET_F_GUEST_UFO);

        virtio_clear_feature(&features, VIRTIO_NET_F_HOST_UFO);

    }

    if (!get_vhost_net(nc->peer)) {

        return features;

    }

    return vhost_net_get_features(get_vhost_net(nc->peer), features);

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
 static void qobject_input_optional(Visitor *v, const char *name, bool *present)

+{

     QObjectInputVisitor *qiv = to_qiv(v);

static void qobject_input_optional(Visitor *v, const char *name, bool *present)

{

    QObjectInputVisitor *qiv = to_qiv(v);

    QObject *qobj = qobject_input_get_object(qiv, name, false, NULL);

    if (!qobj) {

        *present = false;

        return;

    }

    *present = true;

}


--- a/source.c
+++ b/source.c
@@ -1,12 +1,12 @@
 int ff_unlock_avcodec(const AVCodec *codec)
+
 {

     if (codec->caps_internal & FF_CODEC_CAP_INIT_THREADSAFE || !codec->init)
+
+        return 0;

+

     av_assert0(ff_avcodec_locked);

int ff_unlock_avcodec(const AVCodec *codec)

{

    if (codec->caps_internal & FF_CODEC_CAP_INIT_THREADSAFE || !codec->init)

        return 0;

    av_assert0(ff_avcodec_locked);

    ff_avcodec_locked = 0;

    atomic_fetch_add(&entangled_thread_counter, -1);

    if (lockmgr_cb) {

        if ((*lockmgr_cb)(&codec_mutex, AV_LOCK_RELEASE))

            return -1;

    }

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
+int qcow2_cache_put(BlockDriverState *bs, Qcow2Cache *c, void **table)
+
+{
+
+    int i = qcow2_cache_get_table_idx(bs, c, *table);

int qcow2_cache_put(BlockDriverState *bs, Qcow2Cache *c, void **table)

{

    int i = qcow2_cache_get_table_idx(bs, c, *table);

    if (c->entries[i].offset == 0) {

        return -ENOENT;

    }

    c->entries[i].ref--;

    *table = NULL;

    if (c->entries[i].ref == 0) {

        c->entries[i].lru_counter = ++c->lru_counter;

    }

    assert(c->entries[i].ref >= 0);

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -6,11 +6,11 @@

+    if (size < 2 || size > 0x10000 || (size & (size - 1))) {
+
+        DPRINTF("ERROR: ring[%d] size (%d) not a power of 2 "
+
+                "or in range [2, 64K]\n", ring->index, size);

         return false;

bool desc_ring_set_size(DescRing *ring, uint32_t size)

{

    int i;

    if (size < 2 || size > 0x10000 || (size & (size - 1))) {

        DPRINTF("ERROR: ring[%d] size (%d) not a power of 2 "

                "or in range [2, 64K]\n", ring->index, size);

        return false;

    }

    for (i = 0; i < ring->size; i++) {

        if (ring->info[i].buf) {

            g_free(ring->info[i].buf);

        }

    }

    ring->size = size;

    ring->head = ring->tail = 0;

    ring->info = g_realloc(ring->info, size * sizeof(DescInfo));

    if (!ring->info) {

        return false;

    }

    memset(ring->info, 0, size * sizeof(DescInfo));

    for (i = 0; i < size; i++) {

        ring->info[i].ring = ring;

    }

    return true;

}


bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_write)

{

    MemoryRegion *mr;

    hwaddr l, xlat;

    rcu_read_lock();

    while (len > 0) {

        l = len;

        mr = address_space_translate(as, addr, &xlat, &l, is_write);

        if (!memory_access_is_direct(mr, is_write)) {

            l = memory_access_size(mr, l, addr);

            if (!memory_region_access_valid(mr, xlat, l, is_write)) {

                return false;

            }

        }

        len -= l;

        addr += l;

    }

    return true;

}


--- a/source.c
+++ b/source.c
@@ -15,11 +15,11 @@

     err = qemu_strtoull(str, &endptr, 0, &res);
+
+
+
+    g_assert_cmpint(err, ==, 0);
+
     g_assert_cmpint(res, ==, -321);

     g_assert(endptr == str + strlen(str));

static void test_qemu_strtoull_negative(void)

{

    const char *str = "  \t -321";

    char f = 'X';

    const char *endptr = &f;

    uint64_t res = 999;

    int err;

    err = qemu_strtoull(str, &endptr, 0, &res);

    g_assert_cmpint(err, ==, 0);

    g_assert_cmpint(res, ==, -321);

    g_assert(endptr == str + strlen(str));

}


--- a/source.c
+++ b/source.c
@@ -47,11 +47,11 @@
                     tests[test].func(&h, buf0, buf1, codec, chroma_format, bit_depth);

                 }
+
+        }
+
+        report("%s", tests[test].name);
+
     }

 }

void checkasm_check_h264pred(void)

{

    static const struct {

        void (*func)(H264PredContext*, uint8_t*, uint8_t*, int, int, int);

        const char *name;

    } tests[] = {

        { check_pred4x4,   "pred4x4"   },

        { check_pred8x8,   "pred8x8"   },

        { check_pred16x16, "pred16x16" },

        { check_pred8x8l,  "pred8x8l"  },

    };

    DECLARE_ALIGNED(16, uint8_t, buf0)[BUF_SIZE];

    DECLARE_ALIGNED(16, uint8_t, buf1)[BUF_SIZE];

    H264PredContext h;

    int test, codec, chroma_format, bit_depth;

    for (test = 0; test < FF_ARRAY_ELEMS(tests); test++) {

        for (codec = 0; codec < 4; codec++) {

            int codec_id = codec_ids[codec];

            for (bit_depth = 8; bit_depth <= (codec_id == AV_CODEC_ID_H264 ? 10 : 8); bit_depth++)

                for (chroma_format = 1; chroma_format <= (codec_id == AV_CODEC_ID_H264 ? 2 : 1); chroma_format++) {

                    ff_h264_pred_init(&h, codec_id, bit_depth, chroma_format);

                    tests[test].func(&h, buf0, buf1, codec, chroma_format, bit_depth);

                }

        }

        report("%s", tests[test].name);

    }

}


--- a/source.c
+++ b/source.c
@@ -8,11 +8,11 @@

     state->range = ((state->maxval + state->twonear - 1) / state->twonear) + 1;

+
+
+    // QBPP = ceil(log2(RANGE))
+
+    for(state->qbpp = 0; (1 << state->qbpp) < state->range; state->qbpp++);

void ff_jpegls_init_state(JLSState *state){

    int i;

    state->twonear = state->near * 2 + 1;

    state->range = ((state->maxval + state->twonear - 1) / state->twonear) + 1;

    // QBPP = ceil(log2(RANGE))

    for(state->qbpp = 0; (1 << state->qbpp) < state->range; state->qbpp++);

    if(state->bpp < 8)

        state->limit = 16 + 2 * state->bpp - state->qbpp;

    else

        state->limit = (4 * state->bpp) - state->qbpp;

    for(i = 0; i < 367; i++) {

        state->A[i] = FFMAX((state->range + 32) >> 6, 2);

        state->N[i] = 1;

    }

}


--- a/source.c
+++ b/source.c
@@ -4,14 +4,14 @@

     TCGv tmp;

+

     switch (opsize) {

     case OS_BYTE:

         tmp = tcg_temp_new();
+
         if (sign)

             tcg_gen_ext8s_i32(tmp, val);

static inline TCGv gen_extend(TCGv val, int opsize, int sign)

{

    TCGv tmp;

    switch (opsize) {

    case OS_BYTE:

        tmp = tcg_temp_new();

        if (sign)

            tcg_gen_ext8s_i32(tmp, val);

        else

            tcg_gen_ext8u_i32(tmp, val);

        break;

    case OS_WORD:

        tmp = tcg_temp_new();

        if (sign)

            tcg_gen_ext16s_i32(tmp, val);

        else

            tcg_gen_ext16u_i32(tmp, val);

        break;

    case OS_LONG:

    case OS_SINGLE:

        tmp = val;

        break;

    default:

        qemu_assert(0, "Bad operand size");

    }

    return tmp;

}


--- a/source.c
+++ b/source.c
@@ -18,11 +18,11 @@

     trace_run_poll_handlers_begin(ctx, max_ns);

+
+
+    end_time = qemu_clock_get_ns(QEMU_CLOCK_REALTIME) + max_ns;
+
+

     do {

static bool run_poll_handlers(AioContext *ctx, int64_t max_ns)

{

    bool progress;

    int64_t end_time;

    assert(ctx->notify_me);

    assert(qemu_lockcnt_count(&ctx->list_lock) > 0);

    assert(ctx->poll_disable_cnt == 0);

    trace_run_poll_handlers_begin(ctx, max_ns);

    end_time = qemu_clock_get_ns(QEMU_CLOCK_REALTIME) + max_ns;

    do {

        progress = run_poll_handlers_once(ctx);

    } while (!progress && qemu_clock_get_ns(QEMU_CLOCK_REALTIME) < end_time);

    trace_run_poll_handlers_end(ctx, progress);

    return progress;

}


--- a/source.c
+++ b/source.c
@@ -7,11 +7,11 @@
     int ret;

+
+    if ((ret = avio_open_dyn_buf(dyn_cp)) < 0)
+
+        return ret;
+

     if (pb->seekable)

static int start_ebml_master_crc32(AVIOContext *pb, AVIOContext **dyn_cp, ebml_master *master,

                                   unsigned int elementid, uint64_t expectedsize)

{

    int ret;

    if ((ret = avio_open_dyn_buf(dyn_cp)) < 0)

        return ret;

    if (pb->seekable)

        *master = start_ebml_master(pb, elementid, expectedsize);

    else

        *master = start_ebml_master(*dyn_cp, elementid, expectedsize);

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
+static void pci_bridge_region_cleanup(PCIBridge *br)

+{
+
+    PCIBus *parent = br->dev.bus;

     pci_bridge_cleanup_alias(&br->alias_io,

static void pci_bridge_region_cleanup(PCIBridge *br)

{

    PCIBus *parent = br->dev.bus;

    pci_bridge_cleanup_alias(&br->alias_io,

                             parent->address_space_io);

    pci_bridge_cleanup_alias(&br->alias_mem,

                             parent->address_space_mem);

    pci_bridge_cleanup_alias(&br->alias_pref_mem,

                             parent->address_space_mem);

}


--- a/source.c
+++ b/source.c
@@ -7,5 +7,5 @@

     qemu_coroutine_enter(s->send_coroutine, NULL);
+
+}

static void nbd_restart_write(void *opaque)

{

    NbdClientSession *s = opaque;

    qemu_coroutine_enter(s->send_coroutine, NULL);

}


--- a/source.c
+++ b/source.c
@@ -1,4 +1,4 @@
+VLANClientState *qemu_new_vlan_client(VLANState *vlan,

                                       IOReadHandler *fd_read, void *opaque)

VLANClientState *qemu_new_vlan_client(VLANState *vlan,

                                      IOReadHandler *fd_read, void *opaque)

{

    VLANClientState *vc, **pvc;

    vc = qemu_mallocz(sizeof(VLANClientState));

    if (!vc)

        return NULL;

    vc->fd_read = fd_read;

    vc->opaque = opaque;

    vc->vlan = vlan;

    vc->next = NULL;

    pvc = &vlan->first_client;

    while (*pvc != NULL)

        pvc = &(*pvc)->next;

    *pvc = vc;

    return vc;

}


--- a/source.c
+++ b/source.c
@@ -3,11 +3,11 @@
                             uint32_t value)

 {
+
+    GICState *s = (GICState *)opaque;
+
+    if (offset == 0xf00) {
+
         int cpu;

         int irq;

static void gic_dist_writel(void *opaque, target_phys_addr_t offset,

                            uint32_t value)

{

    GICState *s = (GICState *)opaque;

    if (offset == 0xf00) {

        int cpu;

        int irq;

        int mask;

        cpu = gic_get_current_cpu(s);

        irq = value & 0x3ff;

        switch ((value >> 24) & 3) {

        case 0:

            mask = (value >> 16) & ALL_CPU_MASK;

            break;

        case 1:

            mask = ALL_CPU_MASK ^ (1 << cpu);

            break;

        case 2:

            mask = 1 << cpu;

            break;

        default:

            DPRINTF("Bad Soft Int target filter\n");

            mask = ALL_CPU_MASK;

            break;

        }

        GIC_SET_PENDING(irq, mask);

        gic_update(s);

        return;

    }

    gic_dist_writew(opaque, offset, value & 0xffff);

    gic_dist_writew(opaque, offset + 2, value >> 16);

}


--- a/source.c
+++ b/source.c
@@ -1,7 +1,7 @@
 static void qmp_deserialize(void **native_out, void *datap,

+                            VisitorFunc visit, Error **errp)
+
 {

     QmpSerializeData *d = datap;

static void qmp_deserialize(void **native_out, void *datap,

                            VisitorFunc visit, Error **errp)

{

    QmpSerializeData *d = datap;

    QString *output_json = qobject_to_json(qmp_output_get_qobject(d->qov));

    QObject *obj = qobject_from_json(qstring_get_str(output_json));

    QDECREF(output_json);

    d->qiv = qmp_input_visitor_new(obj);

    qobject_decref(obj);

    visit(qmp_input_get_visitor(d->qiv), native_out, errp);

}


--- a/source.c
+++ b/source.c
@@ -12,11 +12,11 @@

          * Don't allow fetch of user.virtfs namesapce

+         * in case of mapped security
+
+         */
+
+        errno = EACCES;

         return -1;

static int local_lremovexattr(FsContext *ctx,

                              const char *path, const char *name)

{

    if ((ctx->fs_sm == SM_MAPPED) &&

        (strncmp(name, "user.virtfs.", 12) == 0)) {

        /*

         * Don't allow fetch of user.virtfs namesapce

         * in case of mapped security

         */

        errno = EACCES;

        return -1;

    }

    return lremovexattr(rpath(ctx, path), name);

}


--- a/source.c
+++ b/source.c
@@ -1,6 +1,6 @@
+PPC_OP(check_reservation)

+{

     if ((uint32_t)env->reserve == (uint32_t)(T0 & ~0x00000003))

PPC_OP(check_reservation)

{

    if ((uint32_t)env->reserve == (uint32_t)(T0 & ~0x00000003))

        env->reserve = -1;

    RETURN();

}


--- a/source.c
+++ b/source.c
@@ -1,8 +1,8 @@
+static void vfio_unmap_bar(VFIOPCIDevice *vdev, int nr)
+
+{
+
+    VFIOBAR *bar = &vdev->bars[nr];

static void vfio_unmap_bar(VFIOPCIDevice *vdev, int nr)

{

    VFIOBAR *bar = &vdev->bars[nr];

    if (!bar->region.size) {

        return;

    }

    vfio_bar_quirk_teardown(vdev, nr);

    memory_region_del_subregion(&bar->region.mem, &bar->region.mmap_mem);

    munmap(bar->region.mmap, memory_region_size(&bar->region.mmap_mem));

    if (vdev->msix && vdev->msix->table_bar == nr) {

        memory_region_del_subregion(&bar->region.mem, &vdev->msix->mmap_mem);

        munmap(vdev->msix->mmap, memory_region_size(&vdev->msix->mmap_mem));

    }

}


--- a/source.c
+++ b/source.c
@@ -13,11 +13,11 @@
         vm_state_notify(0, state);

         qemu_aio_flush();
+
+        bdrv_flush_all();
+
+        monitor_protocol_event(QEVENT_STOP, NULL);
+
     }

 }

static void do_vm_stop(RunState state)

{

    if (runstate_is_running()) {

        cpu_disable_ticks();

        pause_all_vcpus();

        runstate_set(state);

        vm_state_notify(0, state);

        qemu_aio_flush();

        bdrv_flush_all();

        monitor_protocol_event(QEVENT_STOP, NULL);

    }

}


--- a/source.c
+++ b/source.c
@@ -16,11 +16,11 @@

     pki_applet->cert_buffer = NULL;

+    if (pki_applet->sign_buffer) {
+
+        g_free(pki_applet->sign_buffer);
+
+        pki_applet->sign_buffer = NULL;

     }

cac_applet_pki_reset(VCard *card, int channel)

{

    VCardAppletPrivate *applet_private = NULL;

    CACPKIAppletData *pki_applet = NULL;

    applet_private = vcard_get_current_applet_private(card, channel);

    assert(applet_private);

    pki_applet = &(applet_private->u.pki_data);

    pki_applet->cert_buffer = NULL;

    if (pki_applet->sign_buffer) {

        g_free(pki_applet->sign_buffer);

        pki_applet->sign_buffer = NULL;

    }

    pki_applet->cert_buffer_len = 0;

    pki_applet->sign_buffer_len = 0;

    return VCARD_DONE;

}


--- a/source.c
+++ b/source.c
@@ -1,9 +1,9 @@
 static int caca_write_trailer(AVFormatContext *s)

 {
+
+    CACAContext *c = s->priv_data;
+

     av_freep(&c->window_title);

static int caca_write_trailer(AVFormatContext *s)

{

    CACAContext *c = s->priv_data;

    av_freep(&c->window_title);

    caca_free_dither(c->dither);

    caca_free_display(c->display);

    caca_free_canvas(c->canvas);

    return 0;

}


--- a/source.c
+++ b/source.c
@@ -1,5 +1,5 @@
+static inline void vmxnet3_ring_write_curr_cell(Vmxnet3Ring *ring, void *buff)
+
 {

     vmw_shmem_write(vmxnet3_ring_curr_cell_pa(ring), buff, ring->cell_size);

static inline void vmxnet3_ring_write_curr_cell(Vmxnet3Ring *ring, void *buff)

{

    vmw_shmem_write(vmxnet3_ring_curr_cell_pa(ring), buff, ring->cell_size);

}


--- a/source.c
+++ b/source.c
@@ -23,11 +23,11 @@
     if (loglevel & CPU_LOG_INT) {

         fprintf(logfile, "%s: %p n_IRQ %d level %d => pending %08x req %08x\n",
+
+                __func__, env, n_IRQ, level,
+
+                env->pending_interrupts, env->interrupt_request);
+
     }

 #endif

void ppc_set_irq (CPUState *env, int n_IRQ, int level)

{

    if (level) {

        env->pending_interrupts |= 1 << n_IRQ;

        cpu_interrupt(env, CPU_INTERRUPT_HARD);

    } else {

        env->pending_interrupts &= ~(1 << n_IRQ);

        if (env->pending_interrupts == 0)

            cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);

    }

#if defined(PPC_DEBUG_IRQ)

    if (loglevel & CPU_LOG_INT) {

        fprintf(logfile, "%s: %p n_IRQ %d level %d => pending %08x req %08x\n",

                __func__, env, n_IRQ, level,

                env->pending_interrupts, env->interrupt_request);

    }

#endif

}


--- a/source.c
+++ b/source.c
@@ -44,11 +44,11 @@

     QTAILQ_INIT(&mr->subregions);

+    memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
+
+    QTAILQ_INIT(&mr->coalesced);
+
+    mr->name = g_strdup(name);

     mr->dirty_log_mask = 0;

void memory_region_init(MemoryRegion *mr,

                        const char *name,

                        uint64_t size)

{

    mr->ops = NULL;

    mr->parent = NULL;

    mr->size = int128_make64(size);

    if (size == UINT64_MAX) {

        mr->size = int128_2_64();

    }

    mr->addr = 0;

    mr->subpage = false;

    mr->enabled = true;

    mr->terminates = false;

    mr->ram = false;

    mr->romd_mode = true;

    mr->readonly = false;

    mr->rom_device = false;

    mr->destructor = memory_region_destructor_none;

    mr->priority = 0;

    mr->may_overlap = false;

    mr->alias = NULL;

    QTAILQ_INIT(&mr->subregions);

    memset(&mr->subregions_link, 0, sizeof mr->subregions_link);

    QTAILQ_INIT(&mr->coalesced);

    mr->name = g_strdup(name);

    mr->dirty_log_mask = 0;

    mr->ioeventfd_nb = 0;

    mr->ioeventfds = NULL;

    mr->flush_coalesced_mmio = false;

}


--- a/source.c
+++ b/source.c
@@ -10,10 +10,10 @@

                              phys_addr >> TARGET_PAGE_BITS);

+
+
+    return !(memory_region_is_ram(section->mr) ||
+
              memory_region_is_romd(section->mr));

 }

bool cpu_physical_memory_is_io(hwaddr phys_addr)

{

    MemoryRegionSection *section;

    section = phys_page_find(address_space_memory.dispatch,

                             phys_addr >> TARGET_PAGE_BITS);

    return !(memory_region_is_ram(section->mr) ||

             memory_region_is_romd(section->mr));

}


--- a/source.c
+++ b/source.c
@@ -4,11 +4,11 @@

     double d;

+    char *ptr;
+
+    FdMigrationState *s;
+
+    const char *value = qdict_get_str(qdict, "value");

void do_migrate_set_speed(Monitor *mon, const QDict *qdict)

{

    double d;

    char *ptr;

    FdMigrationState *s;

    const char *value = qdict_get_str(qdict, "value");

    d = strtod(value, &ptr);

    switch (*ptr) {

    case 'G': case 'g':

        d *= 1024;

    case 'M': case 'm':

        d *= 1024;

    case 'K': case 'k':

        d *= 1024;

    default:

        break;

    }

    max_throttle = (uint32_t)d;

    s = migrate_to_fms(current_migration);

    if (s && s->file) {

        qemu_file_set_rate_limit(s->file, max_throttle);

    }

}


--- a/source.c
+++ b/source.c
@@ -1,10 +1,10 @@
 static void gen_icread(DisasContext *ctx)
+
+{
+
 #if defined(CONFIG_USER_ONLY)

+    gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);

 #else

static void gen_icread(DisasContext *ctx)

{

#if defined(CONFIG_USER_ONLY)

    gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);

#else

    if (unlikely(ctx->pr)) {

        gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);

        return;

    }

    /* interpreted as no-op */

#endif

}


--- a/source.c
+++ b/source.c
@@ -2,7 +2,7 @@

 {

+    VirtIORNGCcw *dev = VIRTIO_RNG_CCW(obj);

     object_initialize(&dev->vdev, sizeof(dev->vdev), TYPE_VIRTIO_RNG);

static void virtio_ccw_rng_instance_init(Object *obj)

{

    VirtIORNGCcw *dev = VIRTIO_RNG_CCW(obj);

    object_initialize(&dev->vdev, sizeof(dev->vdev), TYPE_VIRTIO_RNG);

    object_property_add_child(obj, "virtio-backend", OBJECT(&dev->vdev), NULL);

    object_property_add_link(obj, "rng", TYPE_RNG_BACKEND,

                             (Object **)&dev->vdev.conf.rng, NULL);

}


--- a/source.c
+++ b/source.c
@@ -21,9 +21,9 @@
         qemu_opt_set_number(opts, "to", addr->to, &error_abort);

     }
+
+    qemu_opt_set(opts, "host", addr->host, &error_abort);
+
+    qemu_opt_set(opts, "port", addr->port, &error_abort);
+
 }

static void inet_addr_to_opts(QemuOpts *opts, const InetSocketAddress *addr)

{

    bool ipv4 = addr->ipv4 || !addr->has_ipv4;

    bool ipv6 = addr->ipv6 || !addr->has_ipv6;

    if (!ipv4 || !ipv6) {

        qemu_opt_set_bool(opts, "ipv4", ipv4, &error_abort);

        qemu_opt_set_bool(opts, "ipv6", ipv6, &error_abort);

    }

    if (addr->has_to) {

        qemu_opt_set_number(opts, "to", addr->to, &error_abort);

    }

    qemu_opt_set(opts, "host", addr->host, &error_abort);

    qemu_opt_set(opts, "port", addr->port, &error_abort);

}


--- a/source.c
+++ b/source.c
@@ -11,11 +11,11 @@
         error_set(errp, QERR_BLOCK_JOB_NOT_ACTIVE, device);

         return;
+
+    }
+
+
+
     trace_qmp_block_job_pause(job);

     block_job_pause(job);

void qmp_block_job_pause(const char *device, Error **errp)

{

    BlockJob *job = find_block_job(device);

    if (!job) {

        error_set(errp, QERR_BLOCK_JOB_NOT_ACTIVE, device);

        return;

    }

    trace_qmp_block_job_pause(job);

    block_job_pause(job);

}